got dia files to work, they're autoconverted to tex

[libreriscv.git] / veera.mdwn

diff --git a/veera.mdwn b/veera.mdwn
index f77ed039ddb55738d94983c93b1204b154744928..1c3bd588df40bf6e5f79bbffc8001d3e401478e2 100644 (file)
--- a/veera.mdwn
+++ b/veera.mdwn
@@ -2,12 +2,15 @@
 
 Helping Core Hardware developers.
 
+* [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=vklr&emailassigned_to1=1&emailtype1=substring&resolution=---)
+
 # Status tracking
 
 ## Currently working on
 
+## Currently deffered
+
  - <https://bugs.libre-soc.org/show_bug.cgi?id=602> Low performance bare minimum functionality SIMD emulator required
- - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[lkcl]]
 
 ## Completed but not yet submitted:
 
@@ -15,11 +18,14 @@ Helping Core Hardware developers.
 
 submitted but not confirmed paid:
 
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=907> structure packing SVG
+   - (EUR 400)
+
 ## Paid
 
 donation from NLNet confirmed received:
 
-### Project 2019-10-043 wishbone
+### NLNet.2019.10.043.Wishbone
 
  - <https://bugs.libre-soc.org/show_bug.cgi?id=595> Convert bitmap images to svg
    - (total EUR 200)
@@ -31,10 +37,56 @@ donation from NLNet confirmed received:
    - (EUR 250)
 
  - <https://bugs.libre-soc.org/show_bug.cgi?id=634>  sphinx - build, install and interface with projects
-  - (EUR 150)
+   - (EUR 150)
 
  - <https://bugs.libre-soc.org/show_bug.cgi?id=651> Convert bitmap images to vector svg - multi i/o dep cell and multi func unit 
-  - (EUR 300)
+   - (EUR 300)
+
+ * [Bug #654](https://bugs.libre-soc.org/show_bug.cgi?id=654):
+  dev\-env\-setup script for symbiflow \(arty A7\-100T\)
+    * &euro;600 out of total of &euro;750
+
+* [Bug #878](https://bugs.libre-soc.org/show_bug.cgi?id=878):
+  image conversion explaining multi-issue
+    * &euro;400 which is the total amount
+
+### NLNet.2019.10.046.Standards
+
+* [Bug #730](https://bugs.libre-soc.org/show_bug.cgi?id=730):
+  adapt ALU test cases to include expected results
+    * &euro;700 out of total of &euro;1000
+
+* [Bug #839](https://bugs.libre-soc.org/show_bug.cgi?id=839):
+  SVP64 / Extra-V / ZOLC whitepaper
+    * &euro;700 out of total of &euro;2000
+
+### NLNet.2019.02
+
+* [Bug #750](https://bugs.libre-soc.org/show_bug.cgi?id=750):
+  Convert pinmux gpio, jtag\-block bitmap diagrams to svg vector
+    * &euro;500 out of total of &euro;500
+
+* [Bug #790](https://bugs.libre-soc.org/show_bug.cgi?id=790):
+  dev-env-setup script for nextpnr\-xilinx
+    * &euro;450 out of total of &euro;600
+
+* [Bug #791](https://bugs.libre-soc.org/show_bug.cgi?id=791):
+  dev-env-setup script for dfutil, openFPGALoader, ujprog and fujprog
+    * &euro;600 out of total of &euro;600
+
+* [Bug #802](https://bugs.libre-soc.org/show_bug.cgi?id=802):
+  Document steps for ls2 microwatt hello world for fpga boards
+    * &euro;450 out of total of &euro;600
+
+### NLNet.2019.10.032.Formal
+
+* [Bug #847](https://bugs.libre-soc.org/show_bug.cgi?id=847):
+  dev\-env\-setup script for binutils-gdb for target powerpc64le\-linux\-gnu
+    * &euro;450 out of total of &euro;650
+
+* [Bug #883](https://bugs.libre-soc.org/show_bug.cgi?id=883):
+  add cvc5 and bitwuzla to hdl-yosys-tools
+    * &euro;800 which is the total amount
 
 ## Completed