re-reserve bit in setvl -- needed for extending registers:

[libreriscv.git] / veera.mdwn

diff --git a/veera.mdwn b/veera.mdwn
index 05b3e3f0d594d61b124bdd9cf82a01b5206c66c0..8ae18aa011b0021eac078f36cd8122b38287e3e7 100644 (file)
--- a/veera.mdwn
+++ b/veera.mdwn
@@ -2,12 +2,22 @@
 
 Helping Core Hardware developers.
 
+* [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=vklr&emailassigned_to1=1&emailtype1=substring&resolution=---)
+
 # Status tracking
 
 ## Currently working on
 
-* [Bug #750](https://bugs.libre-soc.org/show_bug.cgi?id=750):
-  Convert pinmux gpio, jtag\-block bitmap diagrams to svg vector
+### NLNet.2019.10.Formal
+
+* [Bug #838](https://bugs.libre-soc.org/show_bug.cgi?id=838):
+  sync or at least statically check fields.text, power_decoder, trans/svp64, CSVs between each other
+
+* [Bug #839](https://bugs.libre-soc.org/show_bug.cgi?id=839):
+  SVP64 / Extra-V / ZOLC whitepaper
+
+* [Bug #847](https://bugs.libre-soc.org/show_bug.cgi?id=847):
+  dev\-env\-setup script for binutils-gdb for target powerpc64le\-linux\-gnu
 
 ## Currently deffered
 
@@ -50,6 +60,24 @@ donation from NLNet confirmed received:
   adapt ALU test cases to include expected results
     * €700 out of total of €1000
 
+### NLNet.2019.02
+
+* [Bug #750](https://bugs.libre-soc.org/show_bug.cgi?id=750):
+  Convert pinmux gpio, jtag\-block bitmap diagrams to svg vector
+    * €500 out of total of €500
+
+* [Bug #790](https://bugs.libre-soc.org/show_bug.cgi?id=790):
+  dev-env-setup script for nextpnr\-xilinx
+    * €450 out of total of €600
+
+* [Bug #791](https://bugs.libre-soc.org/show_bug.cgi?id=791):
+  dev-env-setup script for dfutil, openFPGALoader, ujprog and fujprog
+    * €600 out of total of €600
+
+* [Bug #802](https://bugs.libre-soc.org/show_bug.cgi?id=802):
+  Document steps for ls2 microwatt hello world for fpga boards
+    * €450 out of total of €600
+
 ## Completed
 
  - <http://bugs.libre-riscv.org/show_bug.cgi?id=181> test and install public-inbox