Bug 1244: changes to pospopcnt

[libreriscv.git] / who_we_are.mdwn

diff --git a/who_we_are.mdwn b/who_we_are.mdwn
index efd6f0621fa2c0e7fe887af587f68bb07ebe6cf7..a14e1813fe41f5f7b31aa8f42379b093a751d8a5 100644 (file)
--- a/who_we_are.mdwn
+++ b/who_we_are.mdwn
@@ -1,11 +1,24 @@
+## We want to:
 
-LibreSOC strives to deliver a fully capable and competitive mass volume Libre integrated System on Chip for use in chromebooks, smartphone, tablets and industrial boards. We want to maximize the degree of trust a customer can place in their processor. We do this by providing the customer the freedom to study, modify, and redistribute the the bootloader and Operating System full source code *and* the full SoC source from HDL to VLSI.
+ - give mass volume appliance manufacturers an alternative to expensive un-auditable chips.
+ - maximize the degree of trust a customer can place in their processor. 
 
-Right now, we're targeting a (quad core, 800mhz, dual issue, GPU, VPU, [and later an ML inference core] ) SOC.
+## We do this by
 
-See our [[3d_gpu/mission_statement]]
+ providing the customer the **freedom to study, modify, and redistribute** the full SoC source from HDL and boot loader to down to the VLSI.
+
+## Libre-SOC is currently targeting:
+
+ - chromebooks
+ - smartphones
+ - tablets
+ - and industrial boards 
+
+## Our First Product Will Be:
 
-## Why a Libre SOC?
+a (quad core, 800mhz, dual issue, GPU, VPU, [and later an ML inference core] ) SOC.
+
+## Why a Libre-SOC?
 
 Its quite hard to guarantee that a performant processors (think pipelined, out-of-order) are functionally perfectly correct. In fact, it often turns out that they [aren’t](https://meltdownattack.com).
 
@@ -13,13 +26,13 @@ There are entire [dissertations](http://www.kroening.com/diss/diss-kroe.pdf) ded
 
 Given the fact that performant bug-free processors no longer exist, how can you trust your processor? The next best thing is to have access to a processor’s design files. Not only have access to them, you must have the freedom to study and improve them.
 
-Such a processor is referred to as a Libre processor. However, processors themselves are only a part of the picture. Nowadays, most contemporary computing tasks involve artificial intelligence, media consumption, wireless connectivity, etc... Thus, we must deliver an entire LibreSOC.
+Such a processor is referred to as a Libre processor. However, processors themselves are only a part of the picture. Nowadays, most contemporary computing tasks involve artificial intelligence, media consumption, wireless connectivity, etc... Thus, we must deliver an entire Libre-SOC.
 
 ## Benefits: Privacy, Safety-Critical, Peace of Mind...
-Our LibreSOC will not have backdoors that plague modern [processors](https://www.csoonline.com/article/3220476/researchers-say-now-you-too-can-disable-intel-me-backdoor-thanks-to-the-nsa.html).
+Our Libre-SOC will not have backdoors that plague modern [processors](https://www.csoonline.com/article/3220476/researchers-say-now-you-too-can-disable-intel-me-backdoor-thanks-to-the-nsa.html).
 
 There is a very real need for reliable safety critical processors (think airplane, smart car, nuclear power plant, pacemaker...).
-LibreSOC posits that it is impossible to trust a processor in a safety critical environment without both access
+Libre-SOC posits that it is impossible to trust a processor in a safety critical environment without both access
 to that processor's source and a cycle accurate HDL simulator that guarantees developers their code behaves as they 
 expect. An ISA level simulator is no longer satisfactory.
 
@@ -27,6 +40,8 @@ Refer to this [IEEE article](https://ieeexplore.ieee.org/document/4519604) by Cy
 
 ## Still Have Questions?
 
-Read about the business and practical benefits of a LibreSOC below.
+Read about the business and practical benefits of a Libre-SOC below.
 
 [[why_a_libresoc]]
+
+See our [[3d_gpu/mission_statement]]