re-reserve bit in setvl -- needed for extending registers:

[libreriscv.git] / ztrans_proposal.mdwn

diff --git a/ztrans_proposal.mdwn b/ztrans_proposal.mdwn
index 5e2685850779d2e19251704dda8e7a88c1716a98..5c4505555ddff4580519b72de5aa3e60257e9e5a 100644 (file)
--- a/ztrans_proposal.mdwn
+++ b/ztrans_proposal.mdwn
@@ -1,3 +1,5 @@
+**OBSOLETE**, superceded by [[openpower/transcendentals]]
+
 # Zftrans - transcendental operations
 
 Summary: