git.libre-soc.org Git - riscv-isa-sim.git/commit

author	Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU>
	Tue, 26 Oct 2010 02:41:39 +0000 (19:41 -0700)
committer	Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU>
	Tue, 26 Oct 2010 02:41:39 +0000 (19:41 -0700)
commit	2c9a83235282c11b197278cd9c072e96c58b2429
tree	f240cf9dd2e30d8e753dc10458ec4587f3c9866e	tree
parent	8456c1e923dc515717c92a50b696d0c6d58e4d93	commit \| diff

[sim,xcc,pk,opcodes] static rounding modes for FP insns

Now, you can either use the RM in the FSR or specify it in the insn.

(Except for FP->int; no dynamic for that.)

46 files changed:

riscv/decode.h		diff \| blob \| history
riscv/execute.h		diff \| blob \| history
riscv/insns/add_d_rm.h	[new file with mode: 0644]	blob
riscv/insns/add_s_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvt_d_l_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvt_d_s_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvt_d_w_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvt_l_d_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvt_l_s_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvt_s_d_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvt_s_l_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvt_s_w_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvt_w_d_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvt_w_s_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvtu_d_l_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvtu_d_w_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvtu_l_d_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvtu_l_s_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvtu_s_l_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvtu_s_w_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvtu_w_d_rm.h	[new file with mode: 0644]	blob
riscv/insns/cvtu_w_s_rm.h	[new file with mode: 0644]	blob
riscv/insns/div_d_rm.h	[new file with mode: 0644]	blob
riscv/insns/div_s_rm.h	[new file with mode: 0644]	blob
riscv/insns/madd_d_rm.h	[new file with mode: 0644]	blob
riscv/insns/madd_s_rm.h	[new file with mode: 0644]	blob
riscv/insns/msub_d_rm.h	[new file with mode: 0644]	blob
riscv/insns/msub_s_rm.h	[new file with mode: 0644]	blob
riscv/insns/mul_d_rm.h	[new file with mode: 0644]	blob
riscv/insns/mul_s_rm.h	[new file with mode: 0644]	blob
riscv/insns/nmadd_d_rm.h	[new file with mode: 0644]	blob
riscv/insns/nmadd_s_rm.h	[new file with mode: 0644]	blob
riscv/insns/nmsub_d_rm.h	[new file with mode: 0644]	blob
riscv/insns/nmsub_s_rm.h	[new file with mode: 0644]	blob
riscv/insns/sqrt_d_rm.h	[new file with mode: 0644]	blob
riscv/insns/sqrt_s_rm.h	[new file with mode: 0644]	blob
riscv/insns/sub_d_rm.h	[new file with mode: 0644]	blob
riscv/insns/sub_s_rm.h	[new file with mode: 0644]	blob
riscv/insns/trunc_l_d.h	[deleted file]	blob \| history
riscv/insns/trunc_l_s.h	[deleted file]	blob \| history
riscv/insns/trunc_w_d.h	[deleted file]	blob \| history
riscv/insns/trunc_w_s.h	[deleted file]	blob \| history
riscv/insns/truncu_l_d.h	[deleted file]	blob \| history
riscv/insns/truncu_l_s.h	[deleted file]	blob \| history
riscv/insns/truncu_w_d.h	[deleted file]	blob \| history
riscv/insns/truncu_w_s.h	[deleted file]	blob \| history

Simple-V augmented version of spike

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