projects / riscv-isa-sim.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 0771c7b) | patch
[xcc, sim] added slei/sleui in lieu of slti/sltiu
authorAndrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
Tue, 7 Sep 2010 23:04:57 +0000 (16:04 -0700)
committerAndrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
Tue, 7 Sep 2010 23:04:57 +0000 (16:04 -0700)
commitc82197c5930d4bf103fe80a7ac877e22b22c4842
tree847392bcd03619bd557fedbb80924ebb4d899c07tree
parent0771c7b0175154df9205c40c37c375693e8a0c7bcommit | diff
[xcc, sim] added slei/sleui in lieu of slti/sltiu

Rationale was that since we have the datapath for rc = (ra < rb),
it's straightforward to also add rc = !(imm < rb) = (rb <= imm).
riscv/execute.h diff | blob | history
riscv/insns/slei.h [new file with mode: 0644] blob
riscv/insns/sleiu.h [new file with mode: 0644] blob
riscv/insns/slti.h [deleted file] blob | history
riscv/insns/sltiu.h [deleted file] blob | history
Simple-V augmented version of spike