git.libre-soc.org Git - riscv-isa-sim.git/commit

author	Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
	Thu, 29 Jul 2010 02:08:04 +0000 (19:08 -0700)
committer	Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
	Thu, 29 Jul 2010 02:08:04 +0000 (19:08 -0700)
commit	e8125348b3d13a2e96ae389efc2a16a1e8e34ea3
tree	4791da3758d733d64ff7bee97a340e8210a525a6	tree
parent	133806b398a42da859a187eebf5792eeaed9e9d1	commit \| diff

[sim,xcc] Changed instruction format to RISC-V

Massive changes to gcc, binutils to support new instruction encoding.
Simulator reflects these changes.

83 files changed:

riscv/applink.cc		diff \| blob \| history
riscv/common.h		diff \| blob \| history
riscv/decode.h		diff \| blob \| history
riscv/execute.h		diff \| blob \| history
riscv/insns/add.h		diff \| blob \| history
riscv/insns/addi.h		diff \| blob \| history
riscv/insns/and.h		diff \| blob \| history
riscv/insns/andi.h		diff \| blob \| history
riscv/insns/beq.h		diff \| blob \| history
riscv/insns/ble.h		diff \| blob \| history
riscv/insns/bleu.h		diff \| blob \| history
riscv/insns/blt.h		diff \| blob \| history
riscv/insns/bltu.h		diff \| blob \| history
riscv/insns/bne.h		diff \| blob \| history
riscv/insns/dadd.h		diff \| blob \| history
riscv/insns/daddi.h		diff \| blob \| history
riscv/insns/ddiv.h		diff \| blob \| history
riscv/insns/ddivu.h		diff \| blob \| history
riscv/insns/di.h		diff \| blob \| history
riscv/insns/div.h		diff \| blob \| history
riscv/insns/divu.h		diff \| blob \| history
riscv/insns/dmfc0.h		diff \| blob \| history
riscv/insns/dmtc0.h		diff \| blob \| history
riscv/insns/dmul.h		diff \| blob \| history
riscv/insns/dmulh.h	[new file with mode: 0644]	blob
riscv/insns/dmulhu.h	[new file with mode: 0644]	blob
riscv/insns/drem.h	[new file with mode: 0644]	blob
riscv/insns/dremu.h	[new file with mode: 0644]	blob
riscv/insns/dsll.h		diff \| blob \| history
riscv/insns/dsll32.h		diff \| blob \| history
riscv/insns/dsllv.h		diff \| blob \| history
riscv/insns/dsra.h		diff \| blob \| history
riscv/insns/dsra32.h		diff \| blob \| history
riscv/insns/dsrav.h		diff \| blob \| history
riscv/insns/dsrl.h		diff \| blob \| history
riscv/insns/dsrl32.h		diff \| blob \| history
riscv/insns/dsrlv.h		diff \| blob \| history
riscv/insns/dsub.h		diff \| blob \| history
riscv/insns/ei.h		diff \| blob \| history
riscv/insns/jalr_c.h	[new file with mode: 0644]	blob
riscv/insns/jalr_j.h	[new file with mode: 0644]	blob
riscv/insns/jalr_r.h	[new file with mode: 0644]	blob
riscv/insns/lb.h		diff \| blob \| history
riscv/insns/lbu.h		diff \| blob \| history
riscv/insns/ld.h		diff \| blob \| history
riscv/insns/lh.h		diff \| blob \| history
riscv/insns/lhu.h		diff \| blob \| history
riscv/insns/lui.h		diff \| blob \| history
riscv/insns/lw.h		diff \| blob \| history
riscv/insns/lwu.h		diff \| blob \| history
riscv/insns/mfc0.h		diff \| blob \| history
riscv/insns/movn.h		diff \| blob \| history
riscv/insns/movz.h		diff \| blob \| history
riscv/insns/mtc0.h		diff \| blob \| history
riscv/insns/mul.h		diff \| blob \| history
riscv/insns/mulh.h	[new file with mode: 0644]	blob
riscv/insns/mulhu.h	[new file with mode: 0644]	blob
riscv/insns/nor.h		diff \| blob \| history
riscv/insns/or.h		diff \| blob \| history
riscv/insns/ori.h		diff \| blob \| history
riscv/insns/rdpc.h	[new file with mode: 0644]	blob
riscv/insns/rem.h	[new file with mode: 0644]	blob
riscv/insns/remu.h	[new file with mode: 0644]	blob
riscv/insns/sb.h		diff \| blob \| history
riscv/insns/sd.h		diff \| blob \| history
riscv/insns/sh.h		diff \| blob \| history
riscv/insns/sll.h		diff \| blob \| history
riscv/insns/sllv.h		diff \| blob \| history
riscv/insns/slori.h	[new file with mode: 0644]	blob
riscv/insns/slt.h		diff \| blob \| history
riscv/insns/slti.h		diff \| blob \| history
riscv/insns/sltiu.h		diff \| blob \| history
riscv/insns/sltu.h		diff \| blob \| history
riscv/insns/sra.h		diff \| blob \| history
riscv/insns/srav.h		diff \| blob \| history
riscv/insns/srl.h		diff \| blob \| history
riscv/insns/srlv.h		diff \| blob \| history
riscv/insns/sub.h		diff \| blob \| history
riscv/insns/sw.h		diff \| blob \| history
riscv/insns/xor.h		diff \| blob \| history
riscv/insns/xori.h		diff \| blob \| history
riscv/mmu.h		diff \| blob \| history
riscv/processor.cc		diff \| blob \| history

Simple-V augmented version of spike

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