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[xcc] instructions now set PC explicitly
author
Andrew Waterman
<waterman@s141.Millennium.Berkeley.EDU>
Sat, 11 Jun 2011 23:12:48 +0000
(16:12 -0700)
committer
Andrew Waterman
<waterman@s141.Millennium.Berkeley.EDU>
Sat, 11 Jun 2011 23:12:48 +0000
(16:12 -0700)
15 files changed:
riscv/decode.h
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riscv/insns/beq.h
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riscv/insns/bge.h
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riscv/insns/bgeu.h
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riscv/insns/blt.h
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riscv/insns/bltu.h
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riscv/insns/bne.h
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riscv/insns/c_addi.h
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riscv/insns/c_beq.h
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riscv/insns/c_bne.h
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riscv/insns/c_j.h
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riscv/insns/eret.h
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riscv/insns/j.h
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riscv/insns/jal.h
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riscv/insns/jalr_c.h
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diff --git
a/riscv/decode.h
b/riscv/decode.h
index 59ca87a117f8a9094132b8cc1585fb7d639b5fe5..6dfe6b973a089df5304e7c642188811f34291f67 100644
(file)
--- a/
riscv/decode.h
+++ b/
riscv/decode.h
@@
-212,6
+212,20
@@
private:
#define sext_xprlen(x) ((sreg_t(x) << (64-xprlen)) >> (64-xprlen))
#define zext_xprlen(x) ((reg_t(x) << (64-xprlen)) >> (64-xprlen))
#define sext_xprlen(x) ((sreg_t(x) << (64-xprlen)) >> (64-xprlen))
#define zext_xprlen(x) ((reg_t(x) << (64-xprlen)) >> (64-xprlen))
+#ifndef RISCV_ENABLE_RVC
+# define set_pc(x) \
+ do { if((x) & (sizeof(insn_t)-1)) \
+ { badvaddr = (x); throw trap_instruction_address_misaligned; } \
+ npc = (x); \
+ } while(0)
+#else
+# define set_pc(x) \
+ do { if((x) & ((sr & SR_EC) ? 1 : 3)) \
+ { badvaddr = (x); throw trap_instruction_address_misaligned; } \
+ npc = (x); \
+ } while(0)
+#endif
+
// RVC stuff
#define INSN_IS_RVC(x) (((x) & 0x3) < 0x3)
// RVC stuff
#define INSN_IS_RVC(x) (((x) & 0x3) < 0x3)
diff --git
a/riscv/insns/beq.h
b/riscv/insns/beq.h
index 072b7b8425965837758f63413b060ba821a40d13..7b26488e434d77715390b54ff5e478949154ecd9 100644
(file)
--- a/
riscv/insns/beq.h
+++ b/
riscv/insns/beq.h
@@
-1,2
+1,2
@@
if(cmp_trunc(RS1) == cmp_trunc(RS2))
if(cmp_trunc(RS1) == cmp_trunc(RS2))
-
npc = BRANCH_TARGET
;
+
set_pc(BRANCH_TARGET)
;
diff --git
a/riscv/insns/bge.h
b/riscv/insns/bge.h
index 45dcc2ee12239aceecb0450724b35cc891e8d7a5..dca544b45381855f4232d9da4b2d67ba83de9616 100644
(file)
--- a/
riscv/insns/bge.h
+++ b/
riscv/insns/bge.h
@@
-1,2
+1,2
@@
if(sreg_t(cmp_trunc(RS1)) >= sreg_t(cmp_trunc(RS2)))
if(sreg_t(cmp_trunc(RS1)) >= sreg_t(cmp_trunc(RS2)))
-
npc = BRANCH_TARGET
;
+
set_pc(BRANCH_TARGET)
;
diff --git
a/riscv/insns/bgeu.h
b/riscv/insns/bgeu.h
index 2ba3fa81e438f7141403ca22e8b39011ead7cb2a..63254669ecda56361211afc80a7990dc59f3d481 100644
(file)
--- a/
riscv/insns/bgeu.h
+++ b/
riscv/insns/bgeu.h
@@
-1,2
+1,2
@@
if(cmp_trunc(RS1) >= cmp_trunc(RS2))
if(cmp_trunc(RS1) >= cmp_trunc(RS2))
-
npc = BRANCH_TARGET
;
+
set_pc(BRANCH_TARGET)
;
diff --git
a/riscv/insns/blt.h
b/riscv/insns/blt.h
index 3ffd20e780cbe51317abdf432f22aae95c19fcca..d84fd7a38f1c4d9845327308f13af43b79fd1381 100644
(file)
--- a/
riscv/insns/blt.h
+++ b/
riscv/insns/blt.h
@@
-1,2
+1,2
@@
if(sreg_t(cmp_trunc(RS1)) < sreg_t(cmp_trunc(RS2)))
if(sreg_t(cmp_trunc(RS1)) < sreg_t(cmp_trunc(RS2)))
-
npc = BRANCH_TARGET
;
+
set_pc(BRANCH_TARGET)
;
diff --git
a/riscv/insns/bltu.h
b/riscv/insns/bltu.h
index 186dcbef5c4669d405db435b9df1d6f313274be6..250fd4f9d9dd66bf6cb3e032403ba5219cf333d9 100644
(file)
--- a/
riscv/insns/bltu.h
+++ b/
riscv/insns/bltu.h
@@
-1,2
+1,2
@@
if(cmp_trunc(RS1) < cmp_trunc(RS2))
if(cmp_trunc(RS1) < cmp_trunc(RS2))
-
npc = BRANCH_TARGET
;
+
set_pc(BRANCH_TARGET)
;
diff --git
a/riscv/insns/bne.h
b/riscv/insns/bne.h
index 39b0b19ebe30f57ee18373f1aacbe4953c4fc774..f7757214b494939480ed348b7a06d92feea5073b 100644
(file)
--- a/
riscv/insns/bne.h
+++ b/
riscv/insns/bne.h
@@
-1,2
+1,2
@@
if(cmp_trunc(RS1) != cmp_trunc(RS2))
if(cmp_trunc(RS1) != cmp_trunc(RS2))
-
npc = BRANCH_TARGET
;
+
set_pc(BRANCH_TARGET)
;
diff --git
a/riscv/insns/c_addi.h
b/riscv/insns/c_addi.h
index c716f6990c1f3698c5e4faa8ad2f59aded5c46af..448e31a337ce97b709710b5d979ee52c436b95de 100644
(file)
--- a/
riscv/insns/c_addi.h
+++ b/
riscv/insns/c_addi.h
@@
-1,10
+1,10
@@
require_rvc;
if(CRD_REGNUM == 0)
{
require_rvc;
if(CRD_REGNUM == 0)
{
- reg_t temp = npc;
- npc = CRS1;
+ reg_t temp = CRS1;
if(CIMM6 & 0x20)
if(CIMM6 & 0x20)
- RA = temp;
+ RA = npc;
+ set_pc(temp);
}
else
CRD = sext_xprlen(CRS2 + CIMM6);
}
else
CRD = sext_xprlen(CRS2 + CIMM6);
diff --git
a/riscv/insns/c_beq.h
b/riscv/insns/c_beq.h
index 4ceaba26f525ac221f9aee3bad45f6dc0fc0f8d7..031d96db5f3236f40bb9422ff1928cb01d09740c 100644
(file)
--- a/
riscv/insns/c_beq.h
+++ b/
riscv/insns/c_beq.h
@@
-1,3
+1,3
@@
require_rvc;
if(cmp_trunc(CRS1S) == cmp_trunc(CRS2S))
require_rvc;
if(cmp_trunc(CRS1S) == cmp_trunc(CRS2S))
-
npc = CBRANCH_TARGET
;
+
set_pc(CBRANCH_TARGET)
;
diff --git
a/riscv/insns/c_bne.h
b/riscv/insns/c_bne.h
index 59f257b57f726c48778da0df783aaa319e579efb..caf922901c560193ade50264870395d50b6930a5 100644
(file)
--- a/
riscv/insns/c_bne.h
+++ b/
riscv/insns/c_bne.h
@@
-1,3
+1,3
@@
require_rvc;
if(cmp_trunc(CRS1S) != cmp_trunc(CRS2S))
require_rvc;
if(cmp_trunc(CRS1S) != cmp_trunc(CRS2S))
-
npc = CBRANCH_TARGET
;
+
set_pc(CBRANCH_TARGET)
;
diff --git
a/riscv/insns/c_j.h
b/riscv/insns/c_j.h
index 87ee0150c3909a871596e3fb611557530f48af04..5ba9c735d8ee446ee14599c487a42bc47e7bdf6d 100644
(file)
--- a/
riscv/insns/c_j.h
+++ b/
riscv/insns/c_j.h
@@
-1,2
+1,2
@@
require_rvc;
require_rvc;
-
npc = CJUMP_TARGET
;
+
set_pc(CJUMP_TARGET)
;
diff --git
a/riscv/insns/eret.h
b/riscv/insns/eret.h
index 37e85885ffd6186d0f277d6dcd1ecabb96b49a5c..46d5bed27ef40a8f8af61607c67933ff30b73c46 100644
(file)
--- a/
riscv/insns/eret.h
+++ b/
riscv/insns/eret.h
@@
-2,4
+2,4
@@
require_supervisor;
if(sr & SR_ET)
throw trap_illegal_instruction;
set_sr(((sr & SR_PS) ? sr : (sr & ~SR_S)) | SR_ET);
if(sr & SR_ET)
throw trap_illegal_instruction;
set_sr(((sr & SR_PS) ? sr : (sr & ~SR_S)) | SR_ET);
-
npc = epc
;
+
set_pc(epc)
;
diff --git
a/riscv/insns/j.h
b/riscv/insns/j.h
index 8abe0ba2a4d40e50500d98f5e2a1053ba6548b1f..3a4da2a79ee96d2aeec79b3c5c21f61ea234d0e7 100644
(file)
--- a/
riscv/insns/j.h
+++ b/
riscv/insns/j.h
@@
-1
+1
@@
-
npc = JUMP_TARGET
;
+
set_pc(JUMP_TARGET)
;
diff --git
a/riscv/insns/jal.h
b/riscv/insns/jal.h
index bca7241ee87a4015f2ed1646e7ac83d21dbdc323..41dc4037d242edbfe15c62acfbe7125bfbd6014c 100644
(file)
--- a/
riscv/insns/jal.h
+++ b/
riscv/insns/jal.h
@@
-1,2
+1,2
@@
RA = npc;
RA = npc;
-
npc = JUMP_TARGET
;
+
set_pc(JUMP_TARGET)
;
diff --git
a/riscv/insns/jalr_c.h
b/riscv/insns/jalr_c.h
index 536ebbf72e180a1db8960eda79957433d9f1055b..91be911b9556c709ff92787ed7f543c9cb8a7eee 100644
(file)
--- a/
riscv/insns/jalr_c.h
+++ b/
riscv/insns/jalr_c.h
@@
-1,3
+1,3
@@
-reg_t temp =
npc
;
-
npc = RS1 + SIMM
;
-
RD = temp
;
+reg_t temp =
RS1
;
+
RD = npc
;
+
set_pc(temp + SIMM)
;