[sim] removed undefined behavior for non-canonical inputs

diff --git a/riscv/decode.h b/riscv/decode.h
index e6d0e8a4e487991a8f44cba92590940cc3f66b71..a49137a3f359f5d4b699db74e58e16fcd5a116de 100644 (file)
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -199,10 +199,12 @@ private:
                              softfloat_exceptionFlags = 0; })
 
 #define require_rvc if(!(sr & SR_EC)) throw trap_illegal_instruction
+#define insn_length(x) (((x).bits & 0x3) < 0x3 ? 2 : 4)
 
 #define sext32(x) ((sreg_t)(int32_t)(x))
-#define insn_length(x) (((x).bits & 0x3) < 0x3 ? 2 : 4)
+#define zext32(x) ((reg_t)(uint32_t)(x))
 #define sext_xprlen(x) ((sreg_t(x) << (64-xprlen)) >> (64-xprlen))
+#define zext_xprlen(x) ((reg_t(x) << (64-xprlen)) >> (64-xprlen))
 
 // RVC stuff
 

diff --git a/riscv/insns/div.h b/riscv/insns/div.h
index 96d9e10ecacbff95bd4e6ae06d35bf0179b44a15..82a40666dcca5021cf67dc7f74c828b52e2e3089 100644 (file)
--- a/riscv/insns/div.h
+++ b/riscv/insns/div.h
@@ -3,4 +3,4 @@ if(RS2 == 0)
 else if(sreg_t(RS1) == INT64_MIN && sreg_t(RS2) == -1)
   RD = RS1;
 else
-  RD = sext_xprlen(sreg_t(RS1) / sreg_t(RS2));
+  RD = sext_xprlen(sext_xprlen(RS1) / sext_xprlen(RS2));

diff --git a/riscv/insns/divu.h b/riscv/insns/divu.h
index d4a4eca0720ec9f4acb7aa60fdbf621ac2dfd2b4..681afd217bbbda882d88de0c7a93848c8ed0d6fa 100644 (file)
--- a/riscv/insns/divu.h
+++ b/riscv/insns/divu.h
@@ -1,4 +1,4 @@
 if(RS2 == 0)
   RD = UINT64_MAX;
 else
-  RD = sext_xprlen(RS1 / RS2);
+  RD = sext_xprlen(zext_xprlen(RS1) / zext_xprlen(RS2));

diff --git a/riscv/insns/divuw.h b/riscv/insns/divuw.h
index 4d64be3b1fbcbeaad90708e724d2cb93504a9341..0ceb04025a017e6d8ea8ae723919d9f37cb3a6d0 100644 (file)
--- a/riscv/insns/divuw.h
+++ b/riscv/insns/divuw.h
@@ -2,4 +2,4 @@ require_xpr64;
 if(RS2 == 0)
   RD = UINT64_MAX;
 else
-  RD = sext32(RS1 / RS2);
+  RD = sext32(zext32(RS1) / zext32(RS2));

diff --git a/riscv/insns/divw.h b/riscv/insns/divw.h
index ee940da860aabb55eb40120a776d7a195dbcfcde..5bf4db0a511850264b30de200e9190a69dfd38df 100644 (file)
--- a/riscv/insns/divw.h
+++ b/riscv/insns/divw.h
@@ -6,4 +6,4 @@ if(RS2 == 0)
 else if(sreg_t(RS1) == INT64_MIN && sreg_t(RS2) == -1)
   RD = RS1;
 else
-  RD = sext32(sreg_t(RS1) / sreg_t(RS2));
+  RD = sext32(int32_t(RS1) / int32_t(RS2));

diff --git a/riscv/insns/mulh.h b/riscv/insns/mulh.h
index ceefccd91bad7b6a47c3a2a85337d4962fa36185..f771a621d7d0c95777acf8f0ff20150b435d8b45 100644 (file)
--- a/riscv/insns/mulh.h
+++ b/riscv/insns/mulh.h
@@ -5,4 +5,4 @@ if(xpr64)
   RD = (int128_t(a) * int128_t(b)) >> 64;
 }
 else
-  RD = sext32((sreg_t(RS1) * sreg_t(RS2)) >> 32);
+  RD = sext32((sext32(RS1) * sext32(RS2)) >> 32);

diff --git a/riscv/insns/mulhsu.h b/riscv/insns/mulhsu.h
index e5f1c9518d267c560fa9cd246a9015752207453b..c832657ead0e131f0b5d51d6feabe7af6bc31142 100644 (file)
--- a/riscv/insns/mulhsu.h
+++ b/riscv/insns/mulhsu.h
@@ -5,4 +5,4 @@ if(xpr64)
   RD = (int128_t(a) * uint128_t(b)) >> 64;
 }
 else
-  RD = sext32((sreg_t(RS1) * reg_t((uint32_t)RS2)) >> 32);
+  RD = sext32((sext32(RS1) * reg_t((uint32_t)RS2)) >> 32);

diff --git a/riscv/insns/rem.h b/riscv/insns/rem.h
index db7e0a96465cd6b23d4e881937a72f640aa2ea50..ac82a56f4179219a30354d11a9e4531ee45569d4 100644 (file)
--- a/riscv/insns/rem.h
+++ b/riscv/insns/rem.h
@@ -3,4 +3,4 @@ if(RS2 == 0)
 else if(sreg_t(RS1) == INT64_MIN && sreg_t(RS2) == -1)
   RD = 0;
 else
-  RD = sext_xprlen(sreg_t(RS1) % sreg_t(RS2));
+  RD = sext_xprlen(sext_xprlen(RS1) % sext_xprlen(RS2));

diff --git a/riscv/insns/remu.h b/riscv/insns/remu.h
index 04499ab3f40d3b4311227d2e36bd2bb08182153c..c698aca2fefadae41f339b9d947e4e47b5ee5c4c 100644 (file)
--- a/riscv/insns/remu.h
+++ b/riscv/insns/remu.h
@@ -1,4 +1,4 @@
 if(RS2 == 0)
   RD = RS1;
 else
-  RD = sext_xprlen(RS1 % RS2);
+  RD = sext_xprlen(zext_xprlen(RS1) % zext_xprlen(RS2));

diff --git a/riscv/insns/remuw.h b/riscv/insns/remuw.h
index ae28fa567ebe437f4fdbe1ad89d80e0f2f98df04..8234af382726a3ae1523de563637902e586d212f 100644 (file)
--- a/riscv/insns/remuw.h
+++ b/riscv/insns/remuw.h
@@ -2,4 +2,4 @@ require_xpr64;
 if(RS2 == 0)
   RD = RS1;
 else
-  RD = sext32(RS1 % RS2);
+  RD = sext32(zext_xprlen(RS1) % zext_xprlen(RS2));

diff --git a/riscv/insns/remw.h b/riscv/insns/remw.h
index 784baa392aa9674bf865e15ea5a991d3a8e35072..c338516cc1fa3a006e783884f60dd5e9e9efe0c9 100644 (file)
--- a/riscv/insns/remw.h
+++ b/riscv/insns/remw.h
@@ -6,4 +6,4 @@ if(RS2 == 0)
 else if(sreg_t(RS1) == INT64_MIN && sreg_t(RS2) == -1)
   RD = 0;
 else
-  RD = sext32(sreg_t(RS1) % sreg_t(RS2));
+  RD = sext32(int32_t(RS1) % int32_t(RS2));

diff --git a/riscv/insns/sra.h b/riscv/insns/sra.h
index 8bbdc0972147b42611b16bbaa677b3737529e5c0..7102da0c0ff46540004ea27aaf250e6c5c045a5d 100644 (file)
--- a/riscv/insns/sra.h
+++ b/riscv/insns/sra.h
@@ -1 +1 @@
-RD = sext_xprlen(sreg_t(RS1) >> (RS2 & (xprlen-1)));
+RD = sext_xprlen(sext_xprlen(RS1) >> (RS2 & (xprlen-1)));

diff --git a/riscv/insns/sraw.h b/riscv/insns/sraw.h
index 103f03a3184b4866864af29ffe3f89557831f3c0..d1783741bbe19fff75e4fcf68d52b527b04a608c 100644 (file)
--- a/riscv/insns/sraw.h
+++ b/riscv/insns/sraw.h
@@ -1,2 +1,2 @@
 require_xpr64;
-RD = sext32(sreg_t(RS1) >> (RS2 & 0x1F));
+RD = sext32(int32_t(RS1) >> (RS2 & 0x1F));