[sim, xcc] Added mffh.d/mtflh.d; fixed FP ABI for 32-bit

diff --git a/riscv/execute.h b/riscv/execute.h
index 554962d148f3826fbd69de38e91e7584af4c1a4c..9a50b998a6f82753652a9e80be76ef9ae4d5564e 100644 (file)
--- a/riscv/execute.h
+++ b/riscv/execute.h
@@ -336,14 +336,14 @@ switch((insn.bits >> 0x19) & 0x7f)
           #include "insns/mff_d.h"
           break;
         }
-        if((insn.bits & 0xfe0fffe0) == 0xd4006c00)
+        if((insn.bits & 0xfe0fffe0) == 0xd4006400)
         {
-          #include "insns/mtfh_d.h"
+          #include "insns/mffh_d.h"
           break;
         }
-        if((insn.bits & 0xfe0fffe0) == 0xd4006400)
+        if((insn.bits & 0xfe007fe0) == 0xd4006c00)
         {
-          #include "insns/mffh_d.h"
+          #include "insns/mtflh_d.h"
           break;
         }
         if((insn.bits & 0xfe0fffe0) == 0xd4006800)

diff --git a/riscv/insns/mffh_d.h b/riscv/insns/mffh_d.h
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..b466f60c86a8f9a886ab11a58aad8ab65bcd8081 100644 (file)
--- a/riscv/insns/mffh_d.h
+++ b/riscv/insns/mffh_d.h
@@ -0,0 +1,2 @@
+require_fp;
+RC = sext32(FRA >> 32);

diff --git a/riscv/insns/mtf_s.h b/riscv/insns/mtf_s.h
index 239df16c7544458fab852db5d19c53d6ac38d7d4..723a2f704d6a05e77cfd100b7ce17e17405f8737 100644 (file)
--- a/riscv/insns/mtf_s.h
+++ b/riscv/insns/mtf_s.h
@@ -1,2 +1,2 @@
 require_fp;
-FRC = sext32(RA);
+FRC = RA;

diff --git a/riscv/insns/mtflh_d.h b/riscv/insns/mtflh_d.h
new file mode 100644 (file)
index 0000000..4e33f39
--- /dev/null
+++ b/riscv/insns/mtflh_d.h
@@ -0,0 +1,2 @@
+require_fp;
+FRC = (RA & 0x00000000FFFFFFFF) | (RB << 32);