Merge pull request #3310 from robinsonb5-PRs/master
[yosys.git] / kernel /
2021-07-28 Marcelina Kościelnickamemory: Introduce $meminit_v2 cell, with EN input.
2021-07-13 Marcelina Kościelnickakernel/mem: Add a coalesce_inits helper.
2021-07-12 Marcelina Kościelnickakernel/mem: Use delayed removal for inits as well.
2021-07-12 Marcelina Kościelnickakernel/mem: Add documentation for more helper functions.
2021-07-12 Marcelina Kościelnickakernel/mem: Commit new values of attributes in emit.
2021-07-12 Marcelina Kościelnickakernel/mem: Make the Mem helpers inherit from AttrObject.
2021-07-11 Marcelina Kościelnickartlil: Make Process handling more uniform with Cell...
2021-07-05 Claire XenMerge pull request #2835 from YosysHQ/verific_command
2021-06-19 whitequarkMerge pull request #2842 from whitequark/fix-wasi-build
2021-06-19 whitequarkFix WASI build after commit 1d88bea1.
2021-06-18 Miodrag MilanovićMerge pull request #2836 from YosysHQ/gatecat/pyosys...
2021-06-16 gatecatpyosys: Clear SIGINT handler after Python loads
2021-06-14 Zachary Snowmacos: fix leak in proc_self_dirname()
2021-06-14 Rupert SwarbrickSimplify some RTLIL destructors
2021-06-09 Marcelina Kościelnickaopt_expr: Fix mul/div/mod by POT patterns to support...
2021-06-09 Claire XenMerge pull request #2817 from YosysHQ/claire/fixemails
2021-06-07 Claire Xenia WolfFixing old e-mail addresses and deadnames
2021-06-01 Marcelina Kościelnickakernel/mem: Recognize some deprecated memory port configs.
2021-05-27 Marcelina KościelnickaMake a few passes auto-call Mem::narrow instead of...
2021-05-27 Marcelina Kościelnickakernel/mem: Add helpers for write port widening.
2021-05-26 Marcelina Kościelnickakernel/mem: Add sub_addr helpers.
2021-05-26 Marcelina Kościelnickakernel/mem: Add prepare_wr_merge helper.
2021-05-25 Marcelina Kościelnickamem/extract_rdff: Fix "no FF made" edge case.
2021-05-25 Marcelina Kościelnickamem/extract_rdff: Add alternate transparency handling.
2021-05-25 Marcelina Kościelnickakernel/mem: Add model support for read port init value...
2021-05-25 Marcelina Kościelnickamem/extract_rdff: Fix wire naming and wide port support.
2021-05-25 Marcelina Kościelnickakernel/mem: Add emulate_priority helper.
2021-05-25 Marcelina Kościelnickakernel/mem: Add a Mem::narrow helper to split up wide...
2021-05-25 Marcelina Kościelnickakernel/mem: Emit support for wide ports in packed mode.
2021-05-25 Marcelina Kościelnickakernel/mem: Add model for wide ports.
2021-05-24 Marcelina Kościelnickakernel/mem: Add priority_mask to model.
2021-05-24 Marcelina Kościelnickahashlib: Add a hash for bool.
2021-05-23 Marcelina Kościelnickaextract_rdff: Add initvals parameter.
2021-05-23 Marcelina KościelnickaAdd new helper class for merging FFs into cells, use...
2021-05-22 Marcelina Kościelnickakernel/rtlil: Extract some helpers for checking memory...
2021-05-22 Marcelina Kościelnickakernel/mem: Add a check() function.
2021-05-22 Marcelina Kościelnickakernel/mem: defer port removal to emit()
2021-03-25 Zachary Snowrtlil: add const accessors for modules, wires, and...
2021-03-23 N. EngelhardtMerge pull request #2696 from nakengelhardt/guidelines
2021-03-22 N. Engelhardtsplit CodingReadme into multiple files
2021-03-19 Miodrag MilanovićMerge pull request #2681 from msinger/fix-issue2606
2021-03-18 Xiretzamodtools: fix use-after-free of cell pointers in ModWalker
2021-03-17 Michael SingerFix check for bad std::regex (fixes #2606)
2021-03-17 gatecatblackbox: Include whiteboxed modules
2021-03-17 LoftyReplace assert in get_reference with more useful error...
2021-03-15 Marcelina Kościelnickartlil: Disallow 0-width chunks in SigSpec.
2021-03-11 whitequarkMerge pull request #2642 from whitequark/cxxrtl-noproc...
2021-03-09 whitequarkMerge pull request #2643 from zachjs/fix-param-no-defau...
2021-03-08 Marcelina KościelnickaAdd support for memory writes in processes.
2021-03-07 whitequarkMerge pull request #2626 from zachjs/param-no-default
2021-03-07 whitequarkMerge pull request #2632 from zachjs/width-limit
2021-03-06 Marcelina KościelnickaRemove a few functions that, in fact, did not exist...
2021-03-05 Dan RavensloftReplace assert in addModule with more useful error...
2021-03-02 Noah Morozeclk2fflogic: nice names for autogenerated signals
2021-03-01 Claire XenMerge pull request #2523 from tomverbeure/define_synthesis
2021-03-01 Claire XenMerge pull request #2524 from bkbncn/patch-1
2021-02-25 whitequarkMerge pull request #2554 from hzeller/master
2021-02-24 whitequarkMerge pull request #2607 from zachjs/logger-error-atexit
2021-02-24 Zachary SnowFix double-free on unmatched logger error pattern
2021-02-23 whitequarkMerge pull request #2594 from zachjs/func-arg-width
2021-02-23 Robert Baruchint -> bool
2021-02-23 Robert BaruchAdds is_wire to SigBit and SigChunk
2021-02-12 gatecatMerge pull request #2585 from YosysHQ/dave/nexus-dotproduct
2021-02-04 whitequarkMerge pull request #2529 from zachjs/unnamed-genblk
2021-02-03 whitequarkMerge pull request #2436 from dalance/fix_generate
2021-01-31 Zachary Snowverilog: significant block scoping improvements
2021-01-01 whitequarkMerge pull request #2480 from YosysHQ/dave/nexus-lram
2020-12-29 whitequarkMerge pull request #2509 from zachjs/issue-2427
2020-12-28 whitequarkMerge pull request #2507 from umarcor/fix/msys2
2020-12-28 umarcorkernel/yosys.h: undef CONST on WIN32
2020-12-23 whitequarkMerge pull request #2476 from zachjs/const-arg-width
2020-12-22 whitequarkMerge pull request #2498 from StefanBruens/Fix_opt_lut
2020-12-22 whitequarkMerge pull request #2497 from whitequark/cxxrtl-reflow
2020-12-22 whitequarkkernel: undef Tcl macros interfering with cxxrtl.
2020-12-22 whitequarkMerge pull request #2479 from zachjs/const-arg-hint
2020-12-22 whitequarkMerge pull request #2491 from zachjs/port-bind-sign
2020-12-19 whitequarkMerge pull request #2487 from whitequark/cxxrtl-outlining
2020-12-14 Marcelina Kościelnickatiminginfo: Error instead of segfault on const signals.
2020-12-12 whitequarkkernel: make IdString::isPublic() const.
2020-12-08 whitequarkMerge pull request #2478 from whitequark/improve-bugpoint
2020-12-07 whitequarkbugpoint: add -wires option.
2020-12-02 whitequarkMerge pull request #2446 from RobertBaruch/rtlil_format
2020-11-25 whitequarkMerge pull request #2452 from whitequark/rtlil-remove...
2020-11-25 Claire XenMerge pull request #2133 from dh73/nodev_head
2020-11-25 whitequarkMerge pull request #2442 from cr1901/sccache
2020-11-25 whitequarkMerge pull request #2450 from nitz/sim-vcd-filename
2020-11-24 whitequarkMerge pull request #2428 from whitequark/check-processes
2020-11-24 Miodrag MilanovićMerge pull request #2448 from nitz/tcl-script-documenta...
2020-11-24 Miodrag MilanovićMerge pull request #2295 from epfl-vlsc/firrtl_blackbox...
2020-11-24 nitztcl -h message only if YOSYS_ENABLE_TCL defined.
2020-11-18 Miodrag MilanovićMerge pull request #2441 from YosysHQ/dave/nexus_dsp_sim
2020-11-10 Miodrag MilanovićMerge pull request #2433 from YosysHQ/paths_as_globals
2020-11-06 Miodrag MilanovicExpose abc and data paths as globals
2020-10-22 N. EngelhardtMerge pull request #2403 from nakengelhardt/sim_timescale
2020-10-21 Marcelina KościelnickaAdd new helper structures to represent memories.
2020-10-01 clairexenMerge pull request #2378 from udif/pr_dollar_high_low
2020-10-01 clairexenMerge pull request #2380 from Xiretza/parallel-tests
2020-09-21 N. EngelhardtMerge pull request #2372 from nakengelhardt/name_is_public
2020-09-17 clairexenMerge pull request #2329 from antmicro/arrays-fix-multi...
2020-09-17 clairexenMerge pull request #2330 from antmicro/arrays-fix-multi...
next