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copy context/roundz, a and b manually in fpmul align
[ieee754fpu.git]
/
src
/
ieee754
/
fpmul
/
mul1.py
2019-07-14
Jacob Lifshay
switch pspec from dict to PipelineSpec
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2019-07-13
Luke Kenneth Casso...
1 bit extra accuracy in mul if the top bit of mantissa...
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2019-07-05
Luke Kenneth Casso...
big (single-purpose) update: move width arg into pspec
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2019-07-02
Luke Kenneth Casso...
use new FPBaseData as a "spec" (context), initialised...
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2019-07-01
Luke Kenneth Casso...
add operand down pipeline chain
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2019-06-16
Luke Kenneth Casso...
get fp mul pipe working using new FPNumBaseRecord
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2019-05-03
Luke Kenneth Casso...
debug fpmul pipeline
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2019-05-03
Luke Kenneth Casso...
add mul1 stage based on add1
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