move radixmmu to unit test format
[soc.git] / src / soc / decoder / isa / radixmmu.py
2021-03-20 Luke Kenneth Casso... move radixmmu to unit test format
2021-03-19 Tobias Platentestcase for _get_pgtable_addr
2021-03-18 Luke Kenneth Casso... add MSR PR read in RADIXMMU ISACaller
2021-03-18 Luke Kenneth Casso... experiment in radixmmu with returning addr_next (and...
2021-03-17 Tobias Platencleanup raduxmmu._walk_tree
2021-03-17 Tobias Platencreate iterative mmu lookup loop
2021-03-17 Luke Kenneth Casso... whoops shift has to be done at same bitwidth
2021-03-17 Luke Kenneth Casso... split out new_lookup function
2021-03-17 Luke Kenneth Casso... add priv and mode to RADIXMMU
2021-03-17 Luke Kenneth Casso... add instr_fetch mode to ISACaller Mem and RADIXMMU
2021-03-17 Luke Kenneth Casso... whitespace
2021-03-16 Tobias Platenradixmmu: detect badtree
2021-03-16 Tobias Platenadd valid, leaf to loop
2021-03-15 Tobias Platenadd rpte bitfields valid and leaf
2021-03-11 Luke Kenneth Casso... whoops PIDR is defined as 32-bits in SPRs.csv (and...
2021-03-11 Tobias Platenfix runtime error
2021-03-10 Tobias Platenradix: reading first page table entry
2021-03-10 Luke Kenneth Casso... add walk_tree arguments it needs
2021-03-09 Luke Kenneth Casso... fix address must convert to SelectableInt
2021-03-09 Luke Kenneth Casso... call decode_ptre on address to obtain shift, mbits...
2021-03-09 Tobias Platenwhitespace
2021-03-09 Tobias PlatenRADIX: call self._walk_tree in ld and st
2021-03-09 Luke Kenneth Casso... debug radix mmu ISACaller
2021-03-09 Tobias Platencomment out broken spr code
2021-03-09 Tobias Platen_walk_tree: access sprs
2021-03-09 Luke Kenneth Casso... create first check_perms RADIX ISACaller function
2021-03-09 Luke Kenneth Casso... move Mem class out of ISACaller
2021-03-09 Luke Kenneth Casso... cleanup imports
2021-03-09 Luke Kenneth Casso... move ISACaller RADIX MMU class to separate module