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cater for illegal instruction (generates a trap)
[soc.git]
/
src
/
soc
/
fu
/
trap
/
main_stage.py
2020-07-04
Luke Kenneth Casso...
cater for illegal instruction (generates a trap)
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2020-07-04
Luke Kenneth Casso...
add sc back in
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2020-07-04
Luke Kenneth Casso...
comments in trap about exceptions using microcoding
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2020-07-04
Luke Kenneth Casso...
update trap docstring
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2020-07-04
Luke Kenneth Casso...
use new consts module
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2020-07-01
Luke Kenneth Casso...
continue debugging trap pipeline
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2020-07-01
Luke Kenneth Casso...
debugging trap pipeline
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2020-07-01
Luke Kenneth Casso...
start running trap unit test, fixing errors
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2020-06-09
Luke Kenneth Casso...
correct local variable references
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2020-06-09
Luke Kenneth Casso...
bit more on TRAP handling (preparing priv instruction)
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2020-06-08
Luke Kenneth Casso...
add traptype and trapaddr to PowerDecoder2. idea is...
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2020-06-08
Luke Kenneth Casso...
found section in 3.0B PDF that refers to "Program Inter...
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2020-06-08
Luke Kenneth Casso...
copy MSR into SRR1 in trap function
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2020-06-08
colepoirier
Fix spelling
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2020-06-07
Luke Kenneth Casso...
update trap with comments
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2020-06-07
colepoirier
Add TrapMainStage.trap() convenience function to set...
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2020-06-07
Luke Kenneth Casso...
move MSR_PR checking to separate functiong
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2020-06-07
colepoirier
Fix missing 'comb +='
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2020-06-05
Luke Kenneth Casso...
update comments
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2020-06-05
Luke Kenneth Casso...
more comments
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2020-06-05
Luke Kenneth Casso...
more comments
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2020-06-05
Luke Kenneth Casso...
a_i not b_in
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2020-06-05
Luke Kenneth Casso...
add comments
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2020-06-05
colepoirier
Made small changes to fu/trap/main_stage to bring nmige...
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2020-06-05
Luke Kenneth Casso...
refer to srr0/1 not a/b
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2020-06-05
Luke Kenneth Casso...
add msr_copy function and use it in OP_TRAP, OP_RFID...
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2020-06-05
Luke Kenneth Casso...
set SRR0 in OP_SC
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2020-06-04
colepoirier
Use a_i and b_i convenience variables instead of a...
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2020-06-04
Luke Kenneth Casso...
mention convenience variables
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2020-06-04
Luke Kenneth Casso...
rename trap to use convenience variables
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2020-06-04
colepoirier
Undo damage done by deleting VHDL microwatt comments,
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2020-06-03
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
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2020-06-03
colepoirier
Fixed missing nia.ok.eq(1) in OP_RFID
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2020-06-03
colepoirier
Fixed merge conflict by using remote changes
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2020-06-03
Luke Kenneth Casso...
convenience variables
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2020-06-03
Luke Kenneth Casso...
FormX not FormXL
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2020-06-03
Luke Kenneth Casso...
add bit more TODO
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2020-06-03
Luke Kenneth Casso...
add more TODOs
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2020-06-03
colepoirier
Fixed OP_RFID and OP_SC in fu/trap/main_stage
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2020-06-03
Luke Kenneth Casso...
add some more constants and ref to POWER9 pdf
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2020-06-03
Luke Kenneth Casso...
add an if for OP_MTMSR and some comments
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2020-06-03
colepoirier
Attempted to fix OP_RFID in TRAP pipeline
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2020-06-02
colepoirier
Implement TRAP instructions OP_RFID and OP_SC
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2020-06-02
Luke Kenneth Casso...
add MSR constants, TODO translated
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2020-06-02
Luke Kenneth Casso...
add TODO comments from microwatt source code
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2020-05-27
Luke Kenneth Casso...
code-morph, add TODO on OP_RFID, OP_SC, OP_ADDPCIS
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2020-05-24
Luke Kenneth Casso...
copy code for MTMSR from microwatt into comments
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2020-05-24
Luke Kenneth Casso...
add links for trap main stage
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2020-05-24
Luke Kenneth Casso...
add untested OP_MTMSR and OP_MFMSR
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2020-05-24
Luke Kenneth Casso...
TODO mention OP_MTMSR/OP_MFMSR
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2020-05-21
Luke Kenneth Casso...
add dedicated TrapPipeSpec
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2020-05-19
Luke Kenneth Casso...
rename module, remove extraneous code and imports
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2020-05-19
Luke Kenneth Casso...
hmmm, branch sets nia to Data as well and sets nia...
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2020-05-19
Luke Kenneth Casso...
use Data on SPRs in Trap InputData just like in BranchO...
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2020-05-19
Luke Kenneth Casso...
code-munge
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2020-05-19
Michael Nolan
Add should_trap signal to trap output data
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2020-05-19
Michael Nolan
Add trap main stage
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2020-05-19
Michael Nolan
Begin adding trap FU
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