projects / soc.git / history
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
fix test_loadstore1_ifetch_multi() in test_loadstore1.py
[soc.git] / src /
2021-12-14 Tobias Platenfix test_loadstore1_ifetch_multi() in test_loadstore1.py tree | commitdiff
2021-12-14 Tobias Platenwip test case for virtual address fetch using fetch... tree | commitdiff
2021-12-14 Tobias Platenfix test_loadstore1_ifetch_multi() tree | commitdiff
2021-12-14 Luke Kenneth Casso... MMU LOOKUP for fetch failed, priv mode is inversion... tree | commitdiff
2021-12-14 Luke Kenneth Casso... link MSR.PR into MMU FSM OP_FETCH_FAILED tree | commitdiff
2021-12-13 Luke Kenneth Casso... request a flush of icache to clear the instruction... tree | commitdiff
2021-12-13 Tobias Platentry to get multi test running tree | commitdiff
2021-12-13 Tobias Platencomments about test_loadstore1_ifetch() tree | commitdiff
2021-12-13 Luke Kenneth Casso... fix test_loadstore1.py with MSR=PR/DR tree | commitdiff
2021-12-13 Luke Kenneth Casso... set pr=0 because privileged mode is pr=0 not pr=1 tree | commitdiff
2021-12-13 Luke Kenneth Casso... add in missing MSRSpec import tree | commitdiff
2021-12-13 Luke Kenneth Casso... commented-out code tree | commitdiff
2021-12-13 Tobias Platenupdate MMU PortInterface Test (misalign) tree | commitdiff
2021-12-13 Tobias Platencleanup test_ldst_pi.py tree | commitdiff
2021-12-13 Tobias Platenupdate old TestMicrowattMemoryPortInterface tree | commitdiff
2021-12-13 Tobias Platenreplace msr_pr with msr tree | commitdiff
2021-12-13 Tobias Platencleanup test_dcbz_pi.py tree | commitdiff
2021-12-13 Luke Kenneth Casso... fix up pr/dr/sf in PortInterfaceBase tree | commitdiff
2021-12-13 Luke Kenneth Casso... pass in new MSRSpec to test_loadstore1.py not msr_pr=1 tree | commitdiff
2021-12-13 Luke Kenneth Casso... convert PortInterfaceBase to pass msr not msr_pr tree | commitdiff
2021-12-13 Luke Kenneth Casso... convert LoadStore1 to new msr.pr/dr/sf tree | commitdiff
2021-12-13 Luke Kenneth Casso... add msr to MMU Op Subset record tree | commitdiff
2021-12-13 Tobias Platenuse NamedTuple pr in test_pi2ls tree | commitdiff
2021-12-13 Luke Kenneth Casso... still have to import MSRSpec tree | commitdiff
2021-12-13 Luke Kenneth Casso... connect up PortInterface priv_mode, virt_mode and mode_... tree | commitdiff
2021-12-13 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2021-12-13 Luke Kenneth Casso... construct an MSRSpec in PortInterfaceBase (not used... tree | commitdiff
2021-12-13 Tobias Platenremove redundant MSRSpec from pimem tree | commitdiff
2021-12-13 Luke Kenneth Casso... whoops wrong variable names tree | commitdiff
2021-12-13 Luke Kenneth Casso... rename msr_pr to priv_mode in LDSTCompUnit tree | commitdiff
2021-12-13 Luke Kenneth Casso... TODO comments about using MSRspec tree | commitdiff
2021-12-13 Luke Kenneth Casso... change PortInterface naming to msr not msr_pr in set_wr... tree | commitdiff
2021-12-13 Tobias Platenadd namedtuple proposed by lkcl in chat tree | commitdiff
2021-12-13 Tobias Platenadd signals to port interface as descibed in bug 756 tree | commitdiff
2021-12-13 Tobias Platenmore work on test_loadstore1_ifetch_multi() tree | commitdiff
2021-12-12 Luke Kenneth Casso... set and reset instruction fault so it does not occur... tree | commitdiff
2021-12-12 Luke Kenneth Casso... when an exception happens, if it is a fetch_failed... tree | commitdiff
2021-12-12 Luke Kenneth Casso... delay MMU LOOKUP done by one clock so that the exceptio... tree | commitdiff
2021-12-12 Luke Kenneth Casso... bring MMU exception out where AllFunctionUnits (and... tree | commitdiff
2021-12-12 Luke Kenneth Casso... bring exception out from MMU FSM, correct "done" tree | commitdiff
2021-12-12 Luke Kenneth Casso... add LDSTException output to MMU tree | commitdiff
2021-12-12 Luke Kenneth Casso... drat, a test inverting the instruction made it into... tree | commitdiff
2021-12-12 Luke Kenneth Casso... starting to hack in fetch failed (including OP_FETCH_FA... tree | commitdiff
2021-12-12 Luke Kenneth Casso... print debugs established that when a wb_get memory... tree | commitdiff
2021-12-12 Luke Kenneth Casso... set fetch_failed into PowerDecoder2 combinatorially tree | commitdiff
2021-12-12 Luke Kenneth Casso... in a terrible botched way, get at I-Cache and set it up tree | commitdiff
2021-12-11 Luke Kenneth Casso... fix bug in unit test, forgot that wb_get mem dict is... tree | commitdiff
2021-12-11 Luke Kenneth Casso... get FetchUnitInterface I-Cache test working (sort-of) tree | commitdiff
2021-12-11 Luke Kenneth Casso... comment out broken test tree | commitdiff
2021-12-11 Luke Kenneth Casso... whoops forgot to add pspec tree | commitdiff
2021-12-11 Tobias Platentypo fix, add missing stop statement to _test_loadstore... tree | commitdiff
2021-12-11 Tobias Platenadd loop with multiple instructions for testing tree | commitdiff
2021-12-11 Tobias Platenadd skeleton for test_loadstore1_ifetch_multi() tree | commitdiff
2021-12-11 Luke Kenneth Casso... add start of test_loadstore1_ifetch_unit_interface() tree | commitdiff
2021-12-11 Luke Kenneth Casso... connect up I-Cache to FetchUnitInterface tree | commitdiff
2021-12-11 Luke Kenneth Casso... add new ConfigFetchUnit option "mmu_cache_wb" which... tree | commitdiff
2021-12-10 Jacob Lifshayadd ternlogi to shift_rot formal test tree | commitdiff
2021-12-10 Jacob Lifshayfix shift_rot formal proof tree | commitdiff
2021-12-10 Tobias Platenuse icache_read in one place tree | commitdiff
2021-12-10 Tobias Platentest_loadstore1.py: begin code deduplication tree | commitdiff
2021-12-09 Luke Kenneth Casso... add some examination of the failed-fetched instruction tree | commitdiff
2021-12-09 Luke Kenneth Casso... add some debug string info to gtkwave tree | commitdiff
2021-12-09 Tobias Platenimplement main part of test_loadstore1_ifetch_invalid() tree | commitdiff
2021-12-09 Tobias Platencleanup test_loadstore1.py tree | commitdiff
2021-12-09 Luke Kenneth Casso... add I-Cache to FSM local variables tree | commitdiff
2021-12-09 Luke Kenneth Casso... wire fetch_failed from I-Cache to PowerDecoder2 tree | commitdiff
2021-12-09 Luke Kenneth Casso... make icache accessible to core, working back to TestIssuer tree | commitdiff
2021-12-09 Luke Kenneth Casso... include SPR.TB in SPR FU tree | commitdiff
2021-12-09 Jacob Lifshayadd bitmanip tests tree | commitdiff
2021-12-09 Jacob Lifshayadd CommonPipeSpec.__getattr__ to forward attributes... tree | commitdiff
2021-12-09 Jacob Lifshayadd parent_pspec everywhere tree | commitdiff
2021-12-09 Jacob Lifshaymake argv handling more flexible tree | commitdiff
2021-12-09 Jacob Lifshayformat code tree | commitdiff
2021-12-08 Luke Kenneth Casso... got fed up of staring at magic constants in the MMU tree | commitdiff
2021-12-08 Luke Kenneth Casso... add special pagetable to ifetch_invalid with execute... tree | commitdiff
2021-12-08 Luke Kenneth Casso... do not try priv_mode on the instruction fetch (not... tree | commitdiff
2021-12-08 Luke Kenneth Casso... add an example pagetable where executable permission... tree | commitdiff
2021-12-08 Tobias Platenbegin working on _test_loadstore1_ifetch_invalid()... tree | commitdiff
2021-12-08 Tobias Platenmore work on test_loadstore1_ifetch_invalid() tree | commitdiff
2021-12-08 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2021-12-08 Tobias Platenadd skeleton for test_loadstore1_ifetch_invalid() tree | commitdiff
2021-12-08 Luke Kenneth Casso... check that no exception occurs in the virtual-memory... tree | commitdiff
2021-12-08 Luke Kenneth Casso... add OP_FETCH_FAILED to MMU Function Unit tree | commitdiff
2021-12-08 Luke Kenneth Casso... make LoadStore1 intsr_fault a "captured flag" - strictl... tree | commitdiff
2021-12-08 Luke Kenneth Casso... remove MSR and add CIA to MMU Input Record tree | commitdiff
2021-12-08 Luke Kenneth Casso... add instr_fault to LoadStore1 FSM tree | commitdiff
2021-12-08 Luke Kenneth Casso... add new PortInterfaceBase external_busy() option tree | commitdiff
2021-12-08 Jacob Lifshayadd comment about draft instructions tree | commitdiff
2021-12-08 Jacob Lifshayaccount for Mock absurdities tree | commitdiff
2021-12-07 Luke Kenneth Casso... complete the i-cache fetch through the MMU, including... tree | commitdiff
2021-12-07 Luke Kenneth Casso... set separate "iside" signal in LoadStore1 to not confuse it tree | commitdiff
2021-12-07 Luke Kenneth Casso... start extending icache loadstore test tree | commitdiff
2021-12-07 Luke Kenneth Casso... whoops another serious error in the CacheTagArray tree | commitdiff
2021-12-07 Luke Kenneth Casso... add first i-cache fetch (non-virtual), no MMU lookup... tree | commitdiff
2021-12-07 Luke Kenneth Casso... code-comments tree | commitdiff
2021-12-07 Luke Kenneth Casso... add in I-Cache into LoadStore1 - presently unused ... tree | commitdiff
2021-12-07 Luke Kenneth Casso... add discussion links and bugreport tree | commitdiff
2021-12-07 Luke Kenneth Casso... invert mmureq statements tree | commitdiff
2021-12-07 Luke Kenneth Casso... submodule tidyup tree | commitdiff
2021-12-07 Jacob Lifshaymake bitmanip operations conditional on pspec.draft_bit... tree | commitdiff
next