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add random mulhd and mulld tests
2020-07-11 Luke Kenneth Casson... add random mulhd and mulld tests
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2020-07-11 Luke Kenneth Casson... enable mul tests after sorting pseudo-code mul overflow
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2020-07-11 Luke Kenneth Casson... special test for mul hw to cope with ignoring OE flag
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2020-07-10 Luke Kenneth Casson... add a DIVS function as separate and discrete from floor_div
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2020-07-10 Luke Kenneth Casson... add random unsigned div tests
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2020-07-10 Luke Kenneth Casson... add overflow div tests
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2020-07-10 Luke Kenneth Casson... propagate missing parameters from div
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2020-07-10 Luke Kenneth Casson... code comments
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2020-07-10 Luke Kenneth Casson... do not set div result if overflow occurs
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2020-07-10 Luke Kenneth Casson... re-enable div random tests and other regressions
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2020-07-10 Luke Kenneth Casson... check for div_overflow equal to None rather than == 1
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2020-07-10 Luke Kenneth Casson... re-add rc/oe back into LDST input record
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2020-07-10 Luke Kenneth Casson... whew panic over, missed a bigendian argument in test_compunit.py
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2020-07-10 Luke Kenneth Casson... add test7 div regression
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2020-07-10 Luke Kenneth Casson... add more debug output for #425
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2020-07-10 Luke Kenneth Casson... add debugging chain for #425
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2020-07-10 Luke Kenneth Casson... update submodule
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2020-07-10 Luke Kenneth Casson... cut/paste error writing to wrong vcd file
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2020-07-09 Luke Kenneth Casson... add regression test for div overflow case
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2020-07-09 Luke Kenneth Casson... slightly different so handling in common output stage
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2020-07-09 Luke Kenneth Casson... also set so only if OE requires it
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2020-07-09 Luke Kenneth Casson... debug information related to 32/64 bit mode
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2020-07-09 Luke Kenneth Casson... bug #424 - 32/64 bit is a *global* flag not a per-op one
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2020-07-09 Luke Kenneth Casson... test top bit 31 in 32-bit mode for CR0 creation
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2020-07-09 Luke Kenneth Casson... ha ha very funny. pipelines being pipelines, you have...
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2020-07-09 Luke Kenneth Casson... whoops test gets copied 4 times on the If.
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2020-07-09 Luke Kenneth Casson... ALU output stage, change logic slightly
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2020-07-09 Luke Kenneth Casson... set xer_ov.ok = 1
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2020-07-09 Luke Kenneth Casson... remove unneeded xer.ca in MulOutputData
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2020-07-09 Luke Kenneth Casson... something weird going on with div. interaction between...
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2020-07-09 Luke Kenneth Casson... simplify setting of mul overflow into xer_ov
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2020-07-09 Luke Kenneth Casson... clarifying comments on setting xer_ov/so
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2020-07-09 Luke Kenneth Casson... DIV overflow needs to be copied into both bits of XER.ov
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2020-07-09 Luke Kenneth Casson... add debug output of DIV results
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2020-07-09 Luke Kenneth Casson... check result first then CR second
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2020-07-09 Luke Kenneth Casson... munge alu_fsm Shifter into looking like CompALU API...
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2020-07-09 Luke Kenneth Casson... resolving issues with div tests (turned out to be nmutil...
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2020-07-09 Luke Kenneth Casson... remove xer_ca from DIV pipeline (took a bit of messing...
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2020-07-09 Luke Kenneth Casson... irony comment on how one line creates a massive array...
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2020-07-09 Luke Kenneth Casson... add new stages etc. to get multiply working without...
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2020-07-09 Luke Kenneth Casson... create new DivMulOutputData which does not have CA...
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2020-07-09 Luke Kenneth Casson... make carry output handling optional in common output...
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2020-07-09 Luke Kenneth Casson... identifying locations where big/little endian is in...
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2020-07-08 Luke Kenneth Casson... resolving bigendian/littleendian modes in qemu sim
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2020-07-08 Luke Kenneth Casson... resolving old and new behaviour for lookup of SPRs
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2020-07-08 Luke Kenneth Casson... resolving old and new behaviour for lookup of SPRs
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2020-07-08 Luke Kenneth Casson... adding in ALU test back in, debugging SPR setup
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2020-07-08 Luke Kenneth Casson... sorting out setting of XER
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2020-07-08 Luke Kenneth Casson... add spr to fast reg converter
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2020-07-08 Luke Kenneth Casson... got test_issuer operational on one unit test
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2020-07-08 Luke Kenneth Casson... switch assembler to little-endian
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2020-07-08 Luke Kenneth Casson... stashing current state of investigation whilst looking...
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2020-07-08 Luke Kenneth Casson... add test trap simulator unit test
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2020-07-08 Luke Kenneth Casson... allow qemu to stop at specified end point
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2020-07-08 Luke Kenneth Casson... add mtspr and bcctrl instructions to helloworld test
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2020-07-08 Luke Kenneth Casson... add option to qemu to break at known alternate address
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2020-07-08 Luke Kenneth Casson... add to/from spr test (mtspr, mfspr)
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2020-07-08 Luke Kenneth Casson... add code-fragment from microwatt helloworld
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2020-07-08 Luke Kenneth Casson... add a simple addis test (regression)
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2020-07-08 Luke Kenneth Casson... copy binary loaded from disk into data memory as well
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2020-07-07 Luke Kenneth Casson... add hello world binary test
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2020-07-07 Luke Kenneth Casson... whoops error in test of dynamic parameter
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2020-07-07 Luke Kenneth Casson... sort-of got binary execution test working
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2020-07-07 Luke Kenneth Casson... code-shuffle on testing to prepare loading large files...
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2020-07-07 Luke Kenneth Casson... ordering of tests for OP_ATTN needed shuffling. seems...
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2020-07-07 Luke Kenneth Casson... whoops got Function.NONE test wrong in PowerDecode2
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2020-07-07 Luke Kenneth Casson... remove unneeded record field from logical_input_record
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2020-07-07 Luke Kenneth Casson... debugging termination (OP_ATTN)
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2020-07-07 Luke Kenneth Casson... update opcode map for OP_ATTN
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2020-07-07 Luke Kenneth Casson... add halted condition in ISACaller, when attn instruction...
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2020-07-07 Luke Kenneth Casson... debugging termination / OP_ATTN
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2020-07-07 Luke Kenneth Casson... add ATTN unit test
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2020-07-07 Luke Kenneth Casson... add core start/stop capability, and OP_ATTN support
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2020-07-07 Luke Kenneth Casson... add in SPR test cases into test_issuer.py
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2020-07-06 Luke Kenneth Casson... use ComMULOpSubset in mul pipeline
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2020-07-06 Luke Kenneth Casson... remove alu unneeded op record data
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2020-07-06 Luke Kenneth Casson... remove alu unneeded op record data
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2020-07-06 Luke Kenneth Casson... remove alu unneeded op record data
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2020-07-06 Luke Kenneth Casson... add mul unit to test_issuer
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2020-07-06 Luke Kenneth Casson... add mul compunit
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2020-07-06 Luke Kenneth Casson... whoops forgot that the mul pipeline is actually a pipeline...
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2020-07-06 Luke Kenneth Casson... do abs slightly differently in SelectableInt
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2020-07-06 Luke Kenneth Casson... continue mul unit test debugging
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2020-07-06 Luke Kenneth Casson... add MULS (signed) version of multiply
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2020-07-06 Luke Kenneth Casson... improve debug for test_sim.py
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2020-07-06 Luke Kenneth Casson... add mullw test to qemu sim
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2020-07-06 Luke Kenneth Casson... fix SelectableInt abs
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2020-07-06 Luke Kenneth Casson... add first simulator mul test
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2020-07-06 Luke Kenneth Casson... investigating mul pipeline
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2020-07-06 Luke Kenneth Casson... SelectableInt: make __mul__ return enough space to...
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2020-07-06 Luke Kenneth Casson... first cut at mul test pipeline
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2020-07-06 Luke Kenneth Casson... add first cut at fu mul pipeline
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2020-07-06 Luke Kenneth Casson... adding mtspr tests
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2020-07-06 Luke Kenneth Casson... adding OP_MTMSR test
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2020-07-06 Luke Kenneth Casson... add mtmsr internal op
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2020-07-06 Luke Kenneth Casson... add mtmsr internal op
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2020-07-06 Luke Kenneth Casson... sort out initialisation of TstL0CacheBuffer in ldst...
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2020-07-05 Luke Kenneth Casson... add mtmsr tests (fail)
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2020-07-05 Luke Kenneth Casson... check trap compunit output properly
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2020-07-05 Luke Kenneth Casson... check msr in trap test, fix OP_RFID
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