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jtag: Sample data input on negative clock edge
2020-10-31 Greg Davilljtag: Sample data input on negative clock edge
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2020-09-20 Greg Davillsram mode: don't transmit trailing invalid bytes
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2020-09-15 Gregory DavillMerge pull request #4 from alanvgreen/nx_clkdiv
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2020-08-30 Greg Davillupdate help screen
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2020-08-30 Greg Davillread/check: fix total bytes
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2020-08-30 Greg Davillremove reading extended device ID
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2020-08-25 Greg Davillnx: Add support for NX IDCODEs
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2020-04-19 Greg Davillupdated readme
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2020-04-19 Greg Davillprogress output on read/write. Add SR2 readout
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2020-04-19 Greg Davilltidy up code
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2020-04-19 Greg Davillintial loading bitstream logic works
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2020-04-19 Greg Davillshift out bytes instead of bits, when possible
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2020-04-19 Greg Davilladd readme
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2020-04-19 Greg Davillmove project into folder
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2020-04-19 Greg Davillcleanup warnings and errors
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2020-04-19 Greg Davillflash functions soould now operate correctly
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2020-04-19 Greg Davillupdate jtag_shift
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2020-04-19 Greg Davillcleanup of un-used code
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2020-04-19 Greg Davillfix issue with missing data
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2020-04-19 Greg DavillFix clock divider
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2020-04-18 Greg Davillmore speedups
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2020-04-18 Greg Davillsome more jtag speedups
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2020-04-18 Greg Davillspeed up jtag xfers
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2020-04-18 Greg Davillslight speedup to jtag-tap
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2020-04-18 Greg Davillfix flag decoding
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2020-04-18 Greg Davillupdate program name
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2020-04-18 Greg Davilladd readout of status register
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2020-04-18 Greg Davillremove some ice40 specifics
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2020-04-18 Greg Davillupdate copyright
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2020-04-18 Greg Davillupdate to background spi entry
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2020-04-18 Greg Davilladd idcode readout
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2020-04-18 Greg Davilladd jtag_tap logic from luna
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2020-04-18 Greg Davillinitial commit, start with iceprog as a base
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