big convert g/s/r mid --> muxid

[ieee754fpu.git] / src / ieee754 / fpadd / align.py

diff --git a/src/ieee754/fpadd/align.py b/src/ieee754/fpadd/align.py
index 381df1e5d7c38b44349c9b93c2cc176ed82d141f..b357e309a00b64cba8ef07056929fff36b76b352 100644 (file)
--- a/src/ieee754/fpadd/align.py
+++ b/src/ieee754/fpadd/align.py
@@ -2,38 +2,41 @@
 # Copyright (C) Jonathan P Dawson 2013
 # 2013-12-12
 
-from nmigen import Module, Signal
+from nmigen import Module, Signal, Elaboratable
 from nmigen.cli import main, verilog
 
 from ieee754.fpcommon.fpbase import FPNumOut, FPNumIn, FPNumBase
+from ieee754.fpcommon.fpbase import FPNumBaseRecord
 from ieee754.fpcommon.fpbase import MultiShiftRMerge
 from ieee754.fpcommon.fpbase import FPState
 from ieee754.fpcommon.denorm import FPSCData
+from ieee754.fpcommon.getop import FPBaseData
 
 
 class FPNumIn2Ops:
 
-    def __init__(self, width, id_wid):
-        self.a = FPNumIn(None, width)
-        self.b = FPNumIn(None, width)
-        self.z = FPNumOut(width, False)
+    def __init__(self, width, pspec):
+        self.a = FPNumBaseRecord(width)
+        self.b = FPNumBaseRecord(width)
+        self.z = FPNumBaseRecord(width, False)
         self.out_do_z = Signal(reset_less=True)
         self.oz = Signal(width, reset_less=True)
-        self.mid = Signal(id_wid, reset_less=True)
+        self.ctx = FPBaseData(width, pspec)
+        self.muxid = self.ctx.muxid
 
     def eq(self, i):
         return [self.z.eq(i.z), self.out_do_z.eq(i.out_do_z), self.oz.eq(i.oz),
-                self.a.eq(i.a), self.b.eq(i.b), self.mid.eq(i.mid)]
+                self.a.eq(i.a), self.b.eq(i.b), self.ctx.eq(i.ctx)]
 
 
 
 class FPAddAlignMultiMod(FPState):
 
     def __init__(self, width):
-        self.in_a = FPNumBase(width)
-        self.in_b = FPNumBase(width)
-        self.out_a = FPNumIn(None, width)
-        self.out_b = FPNumIn(None, width)
+        self.in_a = FPNumBaseRecord(width)
+        self.in_b = FPNumBaseRecord(width)
+        self.out_a = FPNumBaseRecord(width)
+        self.out_b = FPNumBaseRecord(width)
         self.exp_eq = Signal(reset_less=True)
 
     def elaborate(self, platform):
@@ -42,10 +45,10 @@ class FPAddAlignMultiMod(FPState):
 
         m = Module()
 
-        m.submodules.align_in_a = self.in_a
-        m.submodules.align_in_b = self.in_b
-        m.submodules.align_out_a = self.out_a
-        m.submodules.align_out_b = self.out_b
+        #m.submodules.align_in_a = self.in_a
+        #m.submodules.align_in_b = self.in_b
+        #m.submodules.align_out_a = self.out_a
+        #m.submodules.align_out_b = self.out_b
 
         # NOTE: this does *not* do single-cycle multi-shifting,
         #       it *STAYS* in the align state until exponents match
@@ -71,11 +74,11 @@ class FPAddAlignMultiMod(FPState):
 
 class FPAddAlignMulti(FPState):
 
-    def __init__(self, width, id_wid):
+    def __init__(self, width, pspec):
         FPState.__init__(self, "align")
-        self.mod = FPAddAlignMultiMod(width)
-        self.out_a = FPNumIn(None, width)
-        self.out_b = FPNumIn(None, width)
+        self.mod = FPAddAlignMultiMod(width, pspec)
+        self.out_a = FPNumBaseRecord(width)
+        self.out_b = FPNumBaseRecord(width)
         self.exp_eq = Signal(reset_less=True)
 
     def setup(self, m, in_a, in_b):
@@ -93,19 +96,19 @@ class FPAddAlignMulti(FPState):
             m.next = "add_0"
 
 
-class FPAddAlignSingleMod:
+class FPAddAlignSingleMod(Elaboratable):
 
-    def __init__(self, width, id_wid):
+    def __init__(self, width, pspec):
         self.width = width
-        self.id_wid = id_wid
+        self.pspec = pspec
         self.i = self.ispec()
         self.o = self.ospec()
 
     def ispec(self):
-        return FPSCData(self.width, self.id_wid)
+        return FPSCData(self.width, self.pspec, True)
 
     def ospec(self):
-        return FPNumIn2Ops(self.width, self.id_wid)
+        return FPNumIn2Ops(self.width, self.pspec)
 
     def process(self, i):
         return self.o
@@ -127,18 +130,18 @@ class FPAddAlignSingleMod:
         """
         m = Module()
 
-        m.submodules.align_in_a = self.i.a
-        m.submodules.align_in_b = self.i.b
-        m.submodules.align_out_a = self.o.a
-        m.submodules.align_out_b = self.o.b
+        #m.submodules.align_in_a = self.i.a
+        #m.submodules.align_in_b = self.i.b
+        #m.submodules.align_out_a = self.o.a
+        #m.submodules.align_out_b = self.o.b
 
         # temporary (muxed) input and output to be shifted
-        t_inp = FPNumBase(self.width)
-        t_out = FPNumIn(None, self.width)
+        t_inp = FPNumBaseRecord(self.width)
+        t_out = FPNumBaseRecord(self.width)
         espec = (len(self.i.a.e), True)
         msr = MultiShiftRMerge(self.i.a.m_width, espec)
-        m.submodules.align_t_in = t_inp
-        m.submodules.align_t_out = t_out
+        #m.submodules.align_t_in = t_inp
+        #m.submodules.align_t_out = t_out
         m.submodules.multishift_r = msr
 
         ediff = Signal(espec, reset_less=True)
@@ -180,7 +183,7 @@ class FPAddAlignSingleMod:
                              self.o.a.s.eq(self.i.a.s), # whoops forgot sign
                             ]
 
-        m.d.comb += self.o.mid.eq(self.i.mid)
+        m.d.comb += self.o.ctx.eq(self.i.ctx)
         m.d.comb += self.o.z.eq(self.i.z)
         m.d.comb += self.o.out_do_z.eq(self.i.out_do_z)
         m.d.comb += self.o.oz.eq(self.i.oz)
@@ -190,9 +193,9 @@ class FPAddAlignSingleMod:
 
 class FPAddAlignSingle(FPState):
 
-    def __init__(self, width, id_wid):
+    def __init__(self, width, pspec):
         FPState.__init__(self, "align")
-        self.mod = FPAddAlignSingleMod(width, id_wid)
+        self.mod = FPAddAlignSingleMod(width, pspec)
         self.out_a = FPNumIn(None, width)
         self.out_b = FPNumIn(None, width)