quick debug session on FP div stub pipeline

[ieee754fpu.git] / src / ieee754 / fpdiv / div2.py

diff --git a/src/ieee754/fpdiv/div2.py b/src/ieee754/fpdiv/div2.py
index 7acb01b45e54bfb17bc5a8c56d49eb31b6e51ae7..051e87029222616cc45e1557c04de28a73fe9718 100644 (file)
--- a/src/ieee754/fpdiv/div2.py
+++ b/src/ieee754/fpdiv/div2.py
@@ -11,7 +11,7 @@ from ieee754.fpcommon.postcalc import FPAddStage1Data
 from .div0 import FPDivStage0Data
 
 
-class FPDivStage1Mod(FPState, Elaboratable):
+class FPDivStage2Mod(FPState, Elaboratable):
     """ Second stage of div: preparation for normalisation.
     """
 
@@ -67,11 +67,11 @@ class FPDivStage1Mod(FPState, Elaboratable):
         return m
 
 
-class FPDivStage1(FPState):
+class FPDivStage2(FPState):
 
     def __init__(self, width, id_wid):
         FPState.__init__(self, "divider_1")
-        self.mod = FPDivStage1Mod(width)
+        self.mod = FPDivStage2Mod(width)
         self.out_z = FPNumBaseRecord(width, False)
         self.out_of = Overflow()
         self.norm_stb = Signal()