working on implementing fma, f16 rtz formal proof seems likely to work

[ieee754fpu.git] / src / ieee754 / fpfma / pipeline.py

diff --git a/src/ieee754/fpfma/pipeline.py b/src/ieee754/fpfma/pipeline.py
index f0b928d0235c2e1602f2fd5e17b3df4f33e9243f..3661d3c40f7ac2fb1799614dff44f74affde4e8a 100644 (file)
--- a/src/ieee754/fpfma/pipeline.py
+++ b/src/ieee754/fpfma/pipeline.py
@@ -4,7 +4,7 @@ computes `z = (a * c) + b` but only rounds once at the end
 """
 
 from nmutil.singlepipe import ControlBase
-from ieee754.fpfma.special_cases import FPFMASpecialCasesDeNorm
+from ieee754.fpfma.special_cases import FPFMASpecialCasesDeNormStage
 from ieee754.fpfma.main_stage import FPFMAMainStage
 from ieee754.fpfma.norm import FPFMANormToPack
 
@@ -12,7 +12,7 @@ from ieee754.fpfma.norm import FPFMANormToPack
 class FPFMABasePipe(ControlBase):
     def __init__(self, pspec):
         super().__init__()
-        self.sc_denorm = FPFMASpecialCasesDeNorm(pspec)
+        self.sc_denorm = FPFMASpecialCasesDeNormStage(pspec)
         self.main = FPFMAMainStage(pspec)
         self.normpack = FPFMANormToPack(pspec)
         self._eqs = self.connect([self.sc_denorm, self.main, self.normpack])