rename inputs to not include []

[ieee754fpu.git] / src / ieee754 / part_mul_add / multiply.py

diff --git a/src/ieee754/part_mul_add/multiply.py b/src/ieee754/part_mul_add/multiply.py
index 93b1e22877e5998fc3134ee02f8c4d809b5c5617..6f770842f8aa048c6afc2b8e54b5013f2e91e985 100644 (file)
--- a/src/ieee754/part_mul_add/multiply.py
+++ b/src/ieee754/part_mul_add/multiply.py
@@ -301,7 +301,7 @@ class AddReduceData:
     def __init__(self, ppoints, n_inputs, output_width, n_parts):
         self.part_ops = [Signal(2, name=f"part_ops_{i}", reset_less=True)
                           for i in range(n_parts)]
-        self.inputs = [Signal(output_width, name=f"inputs[{i}]",
+        self.inputs = [Signal(output_width, name=f"inputs_{i}",
                               reset_less=True)
                         for i in range(n_inputs)]
         self.reg_partition_points = ppoints.like()