+ with do_sim(self, dut, [dut.a, dut.b, dut.x]) as sim:
+ sim.add_sync_process(process)
+ sim.add_clock(1e-6)
+ sim.run()
+
+ def test_multi_shift_r_32(self):
+ self.tst_multi_shift_r(32)
+
+ def test_multi_shift_r_24(self):
+ self.tst_multi_shift_r(24)
+
+ def tst_multi_shift_l(self, width):
+ dut = MultiShiftModL(width=width)
+
+ def process():
+ for i in range(width):
+ for j in range(1000):
+ a = hash_256(f"MultiShiftModL {i} {j}") % (1 << width)
+ yield from self.check_case(dut, width, a, i)
+
+ with do_sim(self, dut, [dut.a, dut.b, dut.x]) as sim:
+ sim.add_sync_process(process)
+ sim.add_clock(1e-6)
+ sim.run()
+
+ def test_multi_shift_l_32(self):
+ self.tst_multi_shift_l(32)
+
+ def test_multi_shift_l_24(self):
+ self.tst_multi_shift_l(24)
+
+
+if __name__ == '__main__':
+ unittest.main()