-See architectural details [here](./architecture)
-
-# "Gaddie Pitch" (1) for LibreSOC
-
-| What we do | Benefits | Feelings |
-| ------------------------ | --------------------- | ----------------------- |
-| design high-performance | No spying backdoors, | Much less frustrated |
-| efficient and simpler | greatly reduced time | when developing products|
-| processors with built-in | and cost to market | using e.g. China-based |
-| 3D and Video capability | Simpler debugging | products. End-customer |
-| in a fully-transparent | Full transparency | stops complaining, |
-| fashion. | for their customers | Risk and worry gone. |
-
-## You know how...
-
-You know how for computers, you really have no idea how they work? And
-how you keep having to replace them with upgrades? Turns out that
-it's very difficult for medium-sized businesses to design lower-cost products
-because the only cheap processors (almost always from China) do not respect
-Copyright law, provide almost zero documentation, and even Intel processors
-are known to have spying backdoor co-processors in them?
-
-## Well what we do is...
-
-Well, what we do is: design 3D-capable efficient processors based on
-full transparency. All source code, right to the bedrock, hardware
-and software. We don't tell customers "trust us", we say "go have a
-specialist audit the full source, independently". If there's ever
-some documentation missing, the customer can check for themselves when
-designing *their* product around ours.
-
-## In fact...
-
-In fact, one customer that we're talking to is so fed up with a Chinese-based
-$35 component that they are using in a $3000 product, where they are having
-to spend considerable resources to *reverse-engineer* the China component,
-they're willing to bet on our product even before we've
-completed it, they believe in the approach and that our design can help
-them out that much.
-
-# "Gaddie Pitch" (1.5) for LibreSOC + EOMA68
-
-## What we do
-
-Design modular computing appliances based around "Computer Card" standards
-where the "Computer Card" may be upgraded, swapped, shared, re-programmed,
-re-purposed, and re-used.
-
-## Benefits
-
-Almost too numerous to describe. Not just the right to repair: the right
-to redesign and many more. "Computer Card" has the data *and* the apps on
-it, so goodbye file incompatibility: just move **the whole computer** from a
-TV slot to a Laptop slot to a Tablet slot to a Desktop slot. Also the cost
-savings and environmental savings are enormous. Keep the same $300 Laptop
-"Housing" for 15 years, upgrade its parts over time, and not only buy a
-new Computer Card for $30 every 2 years, keep the old one as a "spare",
-give it to the kids, re-program it for watching Videos, the list is endless.
-
-## Feelings
-
-Every person we've spoken to, once they get around the confusion of the
-idea of a "Computer" being inside a "Card" rather than "part of A Laptop",
-has loved both the environmental as well as the cost savings.
-
-# "Gaddie Pitch" (2) for LibreSOC
-
-Cole TODO
+See architectural details [here](./architecture), [[gaddie]] pitch and [[business_plan]]
# Hybrid 3D GPU / CPU / VPU
# Progress:
+* Dec 2021 first MMU unit tests pass, running microwatt mmu.bin.
+ Shows MMU and L1 D/I-Caches as functional in simulation.
+* Apr 2021 cocotb simulation of 180nm ASIC implemented. JTAG TAP
+ confirmed functional on ECP5 and simulation. FreePDK-c4m45
+ created by <https://chips4makers.io>
+* Mar 2021 first SVP64 OpenPOWER augmented Cray-style instructions executed.
+ NGI POINTER EUR 200,000 grant submitted.
+* Feb 2021 FOSDEM2021, Simple-V SVP64 implementation starts in
+ simulator and Test Issuer
+* Jan 2021 FOSDEM2021 talks confirmed, NLnet crypto-primitives proposal
+ submitted, budget agreed for basic binutils and gcc SVP64 support
+* Dec 2020 work on [[openpower/sv/svp64]] started
+* Nov 2020 dry-run 180nm GDSII sent to IMEC
* Oct 2020 [[180nm_Oct2020/ls180/]] pinouts decided, code-freeze initiated
for 180nm test ASIC, GDSII deadline set of Dec 2nd.
* Sep 2020: [first boot](https://youtu.be/72QmWro9BSE) of Litex BIOS on a Versa ECP5 at 55mhz. DDR3 RAM initialisation successful. 180nm ASIC pinouts started [[180nm_Oct2020/ls180]]
projects / libreriscv.git / blobdiff