add mvendor/march WARL update

[libreriscv.git] / isa_conflict_resolution.mdwn

diff --git a/isa_conflict_resolution.mdwn b/isa_conflict_resolution.mdwn
index ea7fb10e1770660ce5849b6b39fb2ee8903717d7..6e02d67c794cd46eae3682feada703e1c8d7aee4 100644 (file)
--- a/isa_conflict_resolution.mdwn
+++ b/isa_conflict_resolution.mdwn
@@ -267,7 +267,7 @@ turn the custom instruction into an actual binary-encoding (plus
 binary-encoding of the context-switching information).  (**TBD, Jacob,
 separate page?  review this para?**)
 
-# mvendorid/marchid WARL
+# mvendorid/marchid WARL <a name="#mvendor_marchid_warl">
 
 (Summary: the only idea that meets the full requirements.  Needs
  toolchain backup, but only when the first chip is released)