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[libreriscv.git]
/
shakti
/
m_class
/
libre_riscv_chennai_2018.tex
diff --git
a/shakti/m_class/libre_riscv_chennai_2018.tex
b/shakti/m_class/libre_riscv_chennai_2018.tex
index d6e3cc69639292bd94e762ecc945b3bcd76ade4d..16573fde8192430bdb5c8fb6b3072ea00d79e475 100644
(file)
--- a/
shakti/m_class/libre_riscv_chennai_2018.tex
+++ b/
shakti/m_class/libre_riscv_chennai_2018.tex
@@
-107,7
+107,7
@@
}
-\frame{\frametitle{
So what's needed? What would a good (Libre)
SoC have?}
+\frame{\frametitle{
What would a good (Libre) boring, mundane
SoC have?}
\begin{itemize}
\item Cover a lot of different scenarios (embedded, tablets, industrial,