add slids

diff --git a/shakti/m_class/libre_riscv_chennai_2018.tex b/shakti/m_class/libre_riscv_chennai_2018.tex
index eac12c3d52ab3500c99b994424218fd510e4ab13..0a7e621f5c5984748c0e51f8ee211d10a7222f9f 100644 (file)
--- a/shakti/m_class/libre_riscv_chennai_2018.tex
+++ b/shakti/m_class/libre_riscv_chennai_2018.tex
@@ -284,8 +284,8 @@
 \frame{\frametitle{Challenging Stuff [4] - Power Management}
 
  \begin{itemize}
-   \item Been done before, but not as a Libre Design.
-   \item Sanjay Charagulla: GlobalFoundries, 22nm mobile process
+   \item Been done before (many times), but not as a Libre Design.
+   \item Sanjay Charagulla: GlobalFoundries 22nm mobile process
             can reach as low as 0.4v
    \item GPIO Banks need per-bank VREF (1.8v? to 3.3v)\\
              IO pads need built-in
@@ -298,7 +298,7 @@
   \end{itemize}
    {\it Really need help.  PLLs, Analog stuff: specific
           domain expertise.  Fall-back example:
-          https://www.dolphin-integration.com.
+          https://www.dolphin-integration.com?
    }
 }