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diff --git a/openpower/sv/rfc/ls012.mdwn b/openpower/sv/rfc/ls012.mdwn
index ceb61cc5c4cfdc28c8616d83605a9e92586b620a..7107185c7bd226a94bd614fc1225de96ea67a589 100644 (file)
--- a/openpower/sv/rfc/ls012.mdwn
+++ b/openpower/sv/rfc/ls012.mdwn
@@ -91,21 +91,28 @@ Audio/Visual, High-Performance Compute, GPU workloads and DSP.
 * 25 - Transcendentals (2-arg) [[openpower/transcendentals]]
 
 Summary tables are created below by different sort categories. Additional
-columns as necessary can be requested to be added as part of update revisions
+columns (and tables) as necessary can be requested to be added as part of update revisions
 to this RFC.
 
 # Target Area summaries
 
+Please note that there are some instructions developed thanks to NLnet
+funding that have not been included here for assessment. Examples
+include `pcdec` and the Galois Field arithmetic operations. From a purely
+practical perspective due to the quantity the lower-priority instructions
+were simply left out. However they remain in the Libre-SOC resources.
+
 ## SVP64 Management instructions
 
 These without question have to go in EXT0xx.  Future extended variants,
 bringing even more powerful capabilities, can be followed up later with
 EXT1xx prefixed variants, which is not possible if placed in EXT2xx.
 *Only `svstep` is actually Vectoriseable*, all other Management
-instructions are UnVectoriseane.  PO1-Prefixed examples include adding
+instructions are UnVectoriseable.  PO1-Prefixed examples include adding
 psvshape in order to support both Inner and Outer Product Matrix
 Schedules, by providing the option to directly reverse the order of the
-triple loops.  Outer is used for standard Matrix Multiply, but Inner is
+triple loops.  Outer is used for standard Matrix Multiply (on top
+of a standard MAC or FMAC instruction), but Inner is
 required for Warshall Transitive Closure (on top of a cumulatively-applied
 max instruction).