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diff --git a/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn b/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn
index 03a1d9b0316f19c460b8f181f9c269ad90de3ce7..74d4a8a4df73a0d0db258c651cd355c7198fad97 100644 (file)
--- a/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn
+++ b/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn
@@ -2,7 +2,7 @@
 
 ## Register file
 
-The default Harmonised RVP GPR register file is divided into a lower bank of Vector[INT8] and an upper bank of Vector[INT16]
+The default Harmonised RVP GPR register file is divided into a lower bank of Vector[INT8] and an upper bank of Vector[INT16].
 In contrast, the Andes Packed SIMD ISA permits any GPR to be used for either INT8 or INT16 vector operations
 
 | Register           | Andes ISA                              | Harmonised RVP ISA            |