reduce number of lines

diff --git a/openpower/sv/rfc/ls005.mdwn b/openpower/sv/rfc/ls005.mdwn
index fd6635cd6f28a2e9f1e2a3ca8a151dc2a569d8e7..f449ff4f92ca0430478901b9ffd22210677a65f1 100644 (file)
--- a/openpower/sv/rfc/ls005.mdwn
+++ b/openpower/sv/rfc/ls005.mdwn
@@ -30,12 +30,10 @@
 **Summary**
 
 ```
-    Exactly as is already done in RISC-V, convert the entire
-    use of 64-bit hard-coding to "XLEN".  Exactly as is in RISC-V,
-    options then include PowerISA-32, PowerISA-64 and PowerISA-128.
-    Unlike in RISC-V, the concept of PowerISA-16 and PowerISA-8 is
-    also floated, for Embedded, AI, Edge, Processing-in-Memory,
-    Distributed Computing and other purposes.
+    Exactly as is already done in RISC-V, convert the entire use of 64-bit hard-coding to "XLEN".
+    Exactly as is in RISC-V, options then include PowerISA-32, PowerISA-64 and PowerISA-128.
+    Unlike in RISC-V, the concept of PowerISA-16 and PowerISA-8 is also floated, for Embedded,
+    AI, Edge, Processing-in-Memory, Distributed Computing and other purposes.
 ```
 
 **Submitter**: Luke Leighton (Libre-SOC)