add testing
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 22 Mar 2018 12:40:01 +0000 (12:40 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 22 Mar 2018 12:40:01 +0000 (12:40 +0000)
shakti/m_class.mdwn

index c6c9c32a64bb715158435f71ed1a720a63e73cc0..4a6f2b2a37e0c1fc676bc431b2918bf496a15d4c 100644 (file)
@@ -337,6 +337,11 @@ and accurate PLL clock timing provided, it may become possible to bit-bang
 and software-emulate high-speed interfaces such as SATA, HDMI, PCIe and
 many more.
 
+# Testing
+
+* cocotb 
+* <https://github.com/aoeldemann/cocotb> cocotb AXI4 stream interface
+
 # Research (to investigate)
 
 * <https://level42.ca/projects/ultra64/Documentation/man/pro-man/pro25/index25.1.html>