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diff --git a/3d_gpu.mdwn b/3d_gpu.mdwn
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@@ -45,7 +45,7 @@ See [[3d_gpu/articles]] online.
 
 # Progress:
 
-* Oct 2020 [[80nm_Oct2020/ls180/]] pinouts decided, code-freeze initiated
+* Oct 2020 [[180nm_Oct2020/ls180/]] pinouts decided, code-freeze initiated
   for 180nm test ASIC, GDSII deadline set of Dec 2nd.
 * Sep 2020: [first boot](https://youtu.be/72QmWro9BSE) of Litex BIOS on a Versa ECP5 at 55mhz.  DDR3 RAM initialisation successful. 180nm ASIC pinouts started [[180nm_Oct2020/ls180]]
 * Aug 2020: [first boot](https://libre-soc.org/3d_gpu/libresoc_litex_bios_first_execution_2020-08-06_16-15.png) of litex BIOS in verilator simulation