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 # Research (to investigate)
 
+* LPC Interface <https://gitlab.raptorengineering.com/raptor-engineering-public/lpc-spi-bridge-fpga>
 * <https://level42.ca/projects/ultra64/Documentation/man/pro-man/pro25/index25.1.html>
 * <http://n64devkit.square7.ch/qa/graphics/ucode.htm>
 * <https://dac.com/media-center/exhibitor-news/synopsys%E2%80%99-designware-universal-ddr-memory-controller-delivers-30-percent> 110nm DDR3 PHY