(no commit message)

diff --git a/HDL_workflow.mdwn b/HDL_workflow.mdwn
index b86d6d76abcb05a1d583b1f6324eda30623c2810..b87847b6ecc43449254083dfd8adba4823634e2e 100644 (file)
--- a/HDL_workflow.mdwn
+++ b/HDL_workflow.mdwn
@@ -543,7 +543,9 @@ See [[HDL_workflow/coriolis2]] page, for those people doing layout work.
 
 A portable FPGA place and route tool.
 
-See [[HDL_workflow/nextpnr]] page for installation instructions of nextpnr with ECP5 support for Lattice FPGA ECP5 series.
+See [[HDL_workflow/nextpnr]] page for installation instructions of nextpnr with ECP5 support for Lattice FPGA ECP5 series.  Also see
+[[HDL_workflow/ECP5_FPGA]] for connecting up to JTAG with a ULX3S
+and the Lattice VERSA_ECP5.
 
 ## Verilator