remove Rc=1 from fmvfg[s]

diff --git a/openpower/sv/int_fp_mv/moves_and_conversions.mdwn b/openpower/sv/int_fp_mv/moves_and_conversions.mdwn
index 02e6c4aeac1d40580228ecc5c5a911b14b207f57..5943161ef4fe55ad6aaa913051b3e5ce393e1afb 100644 (file)
--- a/openpower/sv/int_fp_mv/moves_and_conversions.mdwn
+++ b/openpower/sv/int_fp_mv/moves_and_conversions.mdwn
@@ -2,7 +2,7 @@
 # Immediate Tables
 
 Tables that are used by
-`fmvtg[s][.]`/`fmvfg[s][.]`/`fcvttg[o][.]`/`fcvtfg[s][.]`:
+`fmvtg[s][.]`/`fmvfg[s]`/`fcvttg[o][.]`/`fcvtfg[s][.]`:
 
 ## `IT` -- Integer Type
 
@@ -103,12 +103,11 @@ Special Registers altered:
 
 ```
     fmvfg FRT, RB
-    fmvfg. FRT, RB
 ```
 
 | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form   |
 |-----|------|-------|-------|-------|----|--------|
-| PO  | FRT  | //    | RB    | XO    | Rc | X-Form |
+| PO  | FRT  | //    | RB    | XO    | // | X-Form |
 
 ```
     FRT <- (RB)
@@ -118,13 +117,10 @@ move a 64-bit float from a GPR to a FPR, just copying bits of the IEEE 754
 representation directly. This is equivalent to `std` followed by `lfd`.
 As `fmvfg` is just copying bits, `FPSCR` is not affected in any way.
 
-Rc=1 tests FRT and sets CR1, exactly like all other Scalar Floating-Point
-operations.
-
 Special Registers altered:
 
 ```
-    CR1     (if Rc=1)
+    None
 ```
 
 ----------
@@ -133,12 +129,11 @@ Special Registers altered:
 
 ```
     fmvfgs FRT, RB
-    fmvfgs. FRT, RB
 ```
 
 | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form   |
 |-----|------|-------|-------|-------|----|--------|
-| PO  | FRT  | //    | RB    | XO    | Rc | X-Form |
+| PO  | FRT  | //    | RB    | XO    | // | X-Form |
 
 ```
     FRT <- DOUBLE((RB)[32:63])  # DOUBLE since that's what lfs uses
@@ -149,13 +144,10 @@ Move a BFP32 from a GPR to a FPR, by using `DOUBLE` on the least significant
 FRT. This is equivalent to `stw` followed by `lfs`.
 As `fmvfgs` is just copying the BFP32 form, `FPSCR` is not affected in any way.
 
-Rc=1 tests FRT and sets CR1, exactly like all other Scalar Floating-Point
-operations.
-
 Special Registers altered:
 
 ```
-    CR1     (if Rc=1)
+    None
 ```
 
 ----------