(no commit message)
authorlkcl <lkcl@web>
Sat, 26 Mar 2022 10:11:49 +0000 (10:11 +0000)
committerJacob Lifshay <programmerjake@gmail.com>
Sun, 27 Mar 2022 07:08:34 +0000 (00:08 -0700)
shakti/m_class/DDR.mdwn

index ff76057b04a0e3def7da4abf57e1319400c8e7da..84fd205f6c86d9e36bcf6f7d91d039d20a2fe840 100644 (file)
@@ -2,4 +2,6 @@
 
 * <https://github.com/enjoy-digital/litedram> - controller inc. DDR3 / LPDDR3
 * <https://www.ohwr.org/projects/ddr3-sp6-core/wiki/wiki> - CERN DDR3 ctrl
-* Symbiotic EDA: DDR3 PHY available for $300k.
+* <https://www.linkedin.com/in/michael-taylor-32212816/> working on DDR3 IO Cells
+* <https://github.com/waviousllc/wav-lpddr-hw>
+