runsimsoc2.sh

   1 #!/bin/bash
   2 set -e
   3
   4 LIB_DIR=./src/ecp5u
   5
   6 # create the build_simsoc/top.il file with firmware baked-in
   7 python3 src/ls2.py isim ./coldboot/coldboot.bin
   8
   9 # do some voodoo magic to get icarus to be happy with the ilang file
  10 yosys simsoc.ys
  11
  12 # fix a bug in Lattice ECP5 models
  13 cp ${LIB_DIR}/DDRDLLA.v DDRDLLA.v
  14 patch DDRDLLA.v < DDRDLLA.patch
  15
  16 # string together the icarus verilog files and start runnin
  17 iverilog -Wall -g2012 -s simsoctb -o simsoc \
  18         src/simsoctb.v ./top.v dram_model/ddr3.v \
  19     ${LIB_DIR}/ECLKSYNCB.v ${LIB_DIR}/EHXPLLL.v \
  20     ${LIB_DIR}/PUR.v ${LIB_DIR}/GSR.v \
  21         ${LIB_DIR}/FD1S3AX.v ${LIB_DIR}/SGSR.v ${LIB_DIR}/ODDRX2F.v \
  22     ${LIB_DIR}/ODDRX2DQA.v ${LIB_DIR}/DELAYF.v ${LIB_DIR}/BB.v \
  23     ${LIB_DIR}/OB.v ${LIB_DIR}/IB.v \
  24         ${LIB_DIR}/DQSBUFM.v ${LIB_DIR}/UDFDL5_UDP_X.v \
  25     ${LIB_DIR}/TSHX2DQSA.v ${LIB_DIR}/TSHX2DQA.v \
  26     ${LIB_DIR}/ODDRX2DQSB.v ${LIB_DIR}/IDDRX2DQA.v \
  27     ${LIB_DIR}/UDFDL5E_UDP_X.v \
  28     ${LIB_DIR}/OBZ.v \
  29     ${LIB_DIR}/DELAYG.v \
  30         ${LIB_DIR}/OFS1P3DX.v \
  31         ${LIB_DIR}/IFS1P3DX.v \
  32     DDRDLLA.v \
  33         ${LIB_DIR}/CLKDIVF.v
  34 vvp -n simsoc -fst-speed