Add Tercel PHY reset synchronization
[microwatt.git] / sim_jtag_socket.vhdl
1 library ieee;
2 use ieee.std_logic_1164.all;
3
4 package sim_jtag_socket is
5 procedure sim_jtag_read_msg(out_msg : out std_ulogic_vector(247 downto 0);
6 out_size : out std_ulogic_vector(7 downto 0));
7 attribute foreign of sim_jtag_read_msg : procedure is "VHPIDIRECT sim_jtag_read_msg";
8 procedure sim_jtag_write_msg(in_msg : in std_ulogic_vector(247 downto 0);
9 in_size : in std_ulogic_vector(7 downto 0));
10 attribute foreign of sim_jtag_write_msg : procedure is "VHPIDIRECT sim_jtag_write_msg";
11 end sim_jtag_socket;
12
13 package body sim_jtag_socket is
14 procedure sim_jtag_read_msg(out_msg : out std_ulogic_vector(247 downto 0);
15 out_size : out std_ulogic_vector(7 downto 0)) is
16 begin
17 assert false report "VHPI" severity failure;
18 end sim_jtag_read_msg;
19 procedure sim_jtag_write_msg(in_msg : in std_ulogic_vector(247 downto 0);
20 in_size : in std_ulogic_vector(7 downto 0)) is
21 begin
22 assert false report "VHPI" severity failure;
23 end sim_jtag_write_msg;
24 end sim_jtag_socket;