Add Tercel PHY reset synchronization
[microwatt.git] / core.vhdl
2021-03-24 Anton BlanchardMerge pull request #285 from antonblanchard/Makefile...
2021-03-24 Anton BlanchardMerge pull request #281 from antonblanchard/cache-tlb...
2021-03-15 Anton BlanchardPass icache/dcache/tlb parameters down from soc
2021-02-08 Michael NeulingMerge pull request #269 from paulusmack/pipeline
2021-02-08 Michael NeulingMerge pull request #268 from paulusmack/btc
2021-01-18 Paul Mackerrascore: Move redirect and interrupt delivery logic to...
2021-01-18 Paul Mackerrascore: Track CR hazards and bypasses using tags
2021-01-18 Paul Mackerrascore: Restore bypass path from execute1
2021-01-18 Paul Mackerrascore: Track GPR hazards using tags that propagate throu...
2021-01-18 Paul Mackerrasfetch1: Implement a simple branch target cache
2020-12-14 Michael NeulingMerge pull request #256 from antonblanchard/flash-reset
2020-12-14 Paul MackerrasMerge pull request #257 from antonblanchard/nofpu-fix
2020-12-13 Anton BlanchardFully initialize FPU buses when FPU is disabled
2020-09-17 Michael NeulingMerge pull request #245 from paulusmack/fpu
2020-09-03 Paul Mackerrascore: Add framework for an FPU
2020-09-03 Paul Mackerrascore: Add support for floating-point loads and stores
2020-08-07 Michael NeulingMerge pull request #229 from ozbenh/litedram
2020-07-22 Michael NeulingMerge pull request #233 from paulusmack/master
2020-07-14 Paul Mackerrascore: Don't generate logic for log data when LOG_LENGTH = 0
2020-06-30 Paul MackerrasMerge pull request #206 from Jbalkind/icachecleanup
2020-06-19 Michael NeulingMerge pull request #208 from paulusmack/faster
2020-06-16 Paul MackerrasMake LOG_LENGTH configurable per FPGA variant
2020-06-15 Paul Mackerrascore: Implement a simple branch predictor
2020-06-14 Paul Mackerrasdecode1: Add a stash buffer to the output
2020-06-13 Paul Mackerrascore: Use a busy signal rather than a stall
2020-06-13 Paul Mackerrascore: Double the dcache and icache sizes
2020-06-13 Paul Mackerrascore: Remove fetch2 pipeline stage
2020-06-13 Paul MackerrasAdd core logging
2020-06-05 Michael NeulingMerge pull request #193 from paulusmack/master
2020-06-05 Paul MackerrasMerge pull request #182 from mikey/travis
2020-06-05 Benjamin Herrenschmidticache: Fix icbi potentially clobbering the icache...
2020-06-05 Paul MackerrasMerge pull request #183 from shawnanastasio/addpcis
2020-06-03 Paul MackerrasMerge pull request #168 from shenki/flash-arty
2020-06-02 Anton BlanchardMerge pull request #178 from antonblanchard/intercon
2020-05-25 Benjamin Herrenschmidtirq: Simplify xics->core irq input
2020-05-19 Anton BlanchardMerge pull request #173 from Jbalkind/core-vcs-syntax
2020-05-19 Anton BlanchardMerge pull request #177 from antonblanchard/litedram
2020-05-19 Anton BlanchardMerge branch 'master' into litedram
2020-05-19 Anton BlanchardMerge pull request #176 from antonblanchard/console...
2020-05-19 Anton BlanchardMerge pull request #174 from antonblanchard/yosys-fixes
2020-05-18 Anton BlanchardMerge pull request #169 from paulusmack/mmu
2020-05-16 Benjamin Herrenschmidtsoc/core: Add reset latches
2020-05-14 Paul MackerrasMerge branch 'mmu'
2020-05-14 Anton BlanchardMerge pull request #170 from antonblanchard/litedram
2020-05-08 Paul MackerrasAdd TLB to icache
2020-05-08 Paul MackerrasAdd framework for implementing an MMU
2020-05-08 Paul MackerrasImplement data storage interrupts
2020-05-08 Paul Mackerrasdebug: Provide a way to examine GPRs, fast SPRs and MSR
2020-05-08 Benjamin Herrenschmidtcore: Add alternate reset address
2020-05-06 Paul MackerrasMerge remote-tracking branch 'remotes/origin/master'
2020-05-06 Anton BlanchardMerge pull request #165 from mikey/xics
2020-04-23 Michael NeulingXICS interrupt controller
2020-03-30 Anton BlanchardMerge pull request #153 from paulusmack/master
2020-03-28 Paul Mackerrasloadstore1: Move logic from dcache to loadstore1
2020-02-19 Paul MackerrasRemove single-issue constraint for most loads and stores
2020-01-21 Anton BlanchardMerge pull request #134 from paulusmack/master
2020-01-14 Paul MackerrasPlumb loadstore1 input from execute1 not decode2
2020-01-14 Paul Mackerrasexecute: Implement bypass from output of execute1 to...
2020-01-14 Paul MackerrasMake divider hang off the side of execute1
2020-01-14 Paul MackerrasMake multiplier hang off the side of execute1
2020-01-11 Anton BlanchardMerge pull request #133 from antonblanchard/ghdl-synth
2020-01-11 Anton BlanchardFix a ghdlsynth issue in icache
2020-01-11 Anton BlanchardMerge pull request #131 from antonblanchard/new-tests
2020-01-11 Anton BlanchardDump CTR, LR and CR on sim termination, and update...
2019-12-09 Anton BlanchardMerge pull request #122 from paulusmack/benh-sprs
2019-12-07 Benjamin Herrenschmidtsprs: Store common SPRs in register file
2019-11-15 Anton BlanchardMerge pull request #118 from antonblanchard/bus-pipeline
2019-10-30 Benjamin HerrenschmidtAdd option to not flatten hierarchy
2019-10-25 Anton BlanchardMerge pull request #115 from antonblanchard/reduce...
2019-10-25 Anton BlanchardMerge pull request #113 from mikey/exec-sim-remove
2019-10-25 Anton BlanchardMerge pull request #114 from antonblanchard/dcache
2019-10-24 Michael NeulingRemove SIM generic from execute1
2019-10-23 Benjamin Herrenschmidtinsn: Simplistic implementation of icbi
2019-10-23 Benjamin Herrenschmidticache/dcache: Make both caches 32 lines, 2 ways
2019-10-23 Benjamin Herrenschmidtdcache: Add a dcache
2019-10-16 Anton BlanchardMerge pull request #105 from paulusmack/writeback
2019-10-15 Paul MackerrasRemove execute2 stage
2019-10-12 Anton BlanchardMerge pull request #92 from paulusmack/divider
2019-10-12 Paul Mackerrasdivider: Return 0 for invalid and overflow cases, like...
2019-10-10 Anton BlanchardMerge pull request #79 from deece/uart_address
2019-10-09 Anton BlanchardMerge pull request #83 from paulusmack/logical
2019-10-09 Anton BlanchardMerge pull request #81 from antonblanchard/logical
2019-10-09 Anton BlanchardMerge pull request #82 from antonblanchard/icache-set...
2019-10-08 Benjamin Herrenschmidticache: Set associative icache
2019-10-08 Benjamin Herrenschmidticache: Use narrower block RAMs
2019-10-08 Benjamin Herrenschmidtfetch/icache: Fit icache in BRAM
2019-10-07 Anton BlanchardMerge pull request #78 from paulusmack/new-decode
2019-10-04 Anton BlanchardMerge pull request #80 from antonblanchard/misc
2019-10-03 Benjamin Herrenschmidtregister_file: Move GPRs into distributed RAM
2019-09-24 Anton BlanchardMerge branch 'divider' of https://github.com/paulusmack...
2019-09-24 Anton BlanchardMerge pull request #69 from antonblanchard/debug-module
2019-09-23 Anton BlanchardTerminate test on illegal instruction
2019-09-23 Anton BlanchardFix ghdl error
2019-09-23 Paul MackerrasAdd a divider unit and a testbench for it
2019-09-20 Benjamin HerrenschmidtAdd core debug module
2019-09-12 Anton BlanchardMerge pull request #49 from antonblanchard/icache-2
2019-09-12 Anton BlanchardAdd a simple direct mapped icache
2019-09-11 Anton BlanchardMerge pull request #41 from mikey/travis
2019-09-11 Anton BlanchardMerge pull request #42 from antonblanchard/fetch-rework-v2
2019-09-11 Anton BlanchardReformat core.vhdl
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