Add Tercel PHY reset synchronization
[microwatt.git] / execute1.vhdl
2021-02-08 Michael NeulingMerge pull request #269 from paulusmack/pipeline
2021-02-08 Michael NeulingMerge pull request #268 from paulusmack/btc
2021-02-08 Michael NeulingMerge pull request #273 from antonblanchard/wishbone...
2021-02-08 Michael NeulingMerge pull request #267 from paulusmack/master
2021-01-19 Paul Mackerrascore: Allow multiple loadstore instructions to be in...
2021-01-19 Paul Mackerrascore: Send FPU interrupts to writeback rather than...
2021-01-18 Paul Mackerrascore: Send loadstore1 interrupts to writeback rather...
2021-01-18 Paul Mackerrascore: Move redirect and interrupt delivery logic to...
2021-01-18 Paul Mackerrasexecute1: Move CR result to data path process
2021-01-18 Paul Mackerrasexecute1: Move data-path logic out to a separate process
2021-01-18 Paul Mackerrascore: Track CR hazards and bypasses using tags
2021-01-18 Paul Mackerrascore: Restore bypass path from execute1
2021-01-18 Paul Mackerrascore: Track GPR hazards using tags that propagate throu...
2021-01-18 Paul Mackerrascore: Crack branches that update both CTR and LR
2021-01-18 Paul Mackerrascore: Crack update-form loads into two internal ops
2021-01-18 Paul Mackerrasfetch1: Implement a simple branch target cache
2021-01-15 Paul Mackerrasexecute1: Improve timing on comparisons
2021-01-15 Paul Mackerrascore: Reorganize execute1
2021-01-15 Paul Mackerrascore: Make result multiplexing explicit
2021-01-15 Paul Mackerrasexecute1: Move branch adder after register
2021-01-15 Paul Mackerrasdecode: Add a facility field to the instruction decode...
2021-01-15 Paul Mackerrascore: Implement quadword loads and stores
2021-01-15 Paul Mackerrasexecute1: Update comments about XER forwarding
2021-01-07 Paul MackerrasMerge pull request #263 from antonblanchard/reset-pid
2021-01-07 Paul MackerrasMerge pull request #262 from antonblanchard/reset-tb...
2021-01-03 Anton BlanchardReset TB and DECR
2020-12-01 Michael NeulingMerge pull request #249 from paulusmack/master
2020-11-24 Paul Mackerrasexecute1: Fix forwarding of result when doing delayed...
2020-11-21 Paul Mackerrasexecute1: Fix writing LR for bdnzl/bdzl instructions
2020-11-21 Paul Mackerrascore: Implement mtmsr instruction
2020-10-03 Paul Mackerrasexecute1: Fix bug in trace interrupt vs. ITLB miss
2020-09-17 Michael NeulingMerge pull request #245 from paulusmack/fpu
2020-09-17 Michael NeulingMerge pull request #244 from paulusmack/master
2020-09-03 Paul Mackerrascore: Add framework for an FPU
2020-09-03 Paul Mackerrascore: Add support for single-precision FP loads and...
2020-09-03 Paul Mackerrascore: Add support for floating-point loads and stores
2020-08-29 Paul Mackerrasexecute1: Implement trace interrupts
2020-08-29 Paul Mackerrasdecode1: Avoid overriding fields of v.decode in decode1
2020-08-27 Michael NeulingMerge pull request #239 from paulusmack/master
2020-08-22 Paul Mackerrasloadstore1: Generate alignment interrupts for unaligned...
2020-08-20 Paul Mackerrascore: Implement 32-bit mode
2020-08-20 Paul Mackerrascore: Implement big-endian mode
2020-08-13 Michael NeulingMerge pull request #235 from paulusmack/master
2020-08-07 Michael NeulingMerge pull request #229 from ozbenh/litedram
2020-08-07 Paul Mackerrascore: Implement BCD Assist instructions addg6s, cdtbcd...
2020-08-06 Paul Mackerrascore: Implement the addex instruction
2020-08-06 Paul MackerrasAdd random number generator and implement the darn...
2020-08-06 Paul Mackerrascore: Implement the maddhd, maddhdu and maddld instructions
2020-08-06 Paul Mackerrascore: Implement the cmpeqb and cmprb instructions
2020-08-06 Paul Mackerrascore: Implement the bpermd instruction
2020-08-06 Paul Mackerrascore: Implement the setb instruction
2020-08-06 Paul Mackerrascore: Implement the mcrxrx instruction
2020-08-05 Paul Mackerrasexecute1: Use r.<field> not v.<field> in countzero...
2020-08-05 Paul Mackerrasexecute1: Take an extra cycle for OE=1 multiply instruc...
2020-08-05 Paul Mackerrasmultiplier: Generalize interface to the multiplier
2020-07-22 Michael NeulingMerge pull request #233 from paulusmack/master
2020-07-14 Paul Mackerrascore: Don't generate logic for log data when LOG_LENGTH = 0
2020-07-14 Paul Mackerrasexecute1: Ease timing on redirect_nia
2020-07-09 Michael NeulingMerge pull request #228 from ozbenh/misc
2020-07-09 Michael NeulingMerge pull request #222 from iamjpn/master
2020-07-07 Jordan Niethecore: Implement PVR register
2020-06-30 Michael NeulingMerge pull request #216 from paulusmack/cfar
2020-06-30 Paul MackerrasMerge pull request #206 from Jbalkind/icachecleanup
2020-06-29 Paul Mackerrasexecute1: Do forwarding of the CR result to the next...
2020-06-29 Paul Mackerrasexecute1: Add latch to redirect path
2020-06-29 Paul Mackerrascore: Implement CFAR register
2020-06-29 Michael NeulingMerge pull request #213 from ozbenh/uart16550
2020-06-23 Benjamin Herrenschmidtex1: Add SPR_TBU support
2020-06-19 Michael NeulingMerge pull request #208 from paulusmack/faster
2020-06-15 Paul Mackerrasexecute1: Reduce width of the result mux to help timing
2020-06-15 Paul Mackerrascore: Implement a simple branch predictor
2020-06-13 Paul Mackerrasloadstore1: Reduce busy cycles
2020-06-13 Paul Mackerrascore: Use a busy signal rather than a stall
2020-06-13 Paul Mackerrasmultiply: Move selection of result bits into execute1
2020-06-13 Paul MackerrasAdd core logging
2020-06-05 Paul Mackerrascore: Do addpcis using the main adder (#189)
2020-06-05 Paul MackerrasMerge pull request #183 from shawnanastasio/addpcis
2020-06-03 Paul MackerrasMerge pull request #168 from shenki/flash-arty
2020-06-02 Anton BlanchardMerge pull request #178 from antonblanchard/intercon
2020-05-26 Shawn AnastasioImplement the addpcis instruction
2020-05-25 Benjamin Herrenschmidtirq: Simplify xics->core irq input
2020-05-19 Anton BlanchardMerge pull request #171 from shenki/mw-debug-features
2020-05-19 Anton BlanchardMerge pull request #173 from Jbalkind/core-vcs-syntax
2020-05-19 Anton BlanchardMerge branch 'master' into litedram
2020-05-19 Anton BlanchardMerge pull request #176 from antonblanchard/console...
2020-05-19 Jonathan BalkindChanges for compilation with VCS:
2020-05-19 Anton BlanchardMerge pull request #174 from antonblanchard/yosys-fixes
2020-05-18 Anton BlanchardMerge pull request #169 from paulusmack/mmu
2020-05-14 Paul MackerrasMerge branch 'mmu'
2020-05-08 Paul MackerrasImplement slbia as a dTLB/iTLB flush
2020-05-08 Paul MackerrasMMU: Do radix page table walks on iTLB misses
2020-05-08 Paul MackerrasAdd TLB to icache
2020-05-08 Paul MackerrasMMU: Implement data segment interrupts
2020-05-08 Paul MackerrasImplement access permission checks
2020-05-08 Paul MackerrasImplement data storage interrupts
2020-05-08 Paul Mackerrasdcache: Implement data TLB
2020-05-08 Paul MackerrasPass mtspr/mfspr to MMU-related SPRs down to loadstore1
2020-05-08 Paul Mackerrasdebug: Provide a way to examine GPRs, fast SPRs and MSR
2020-05-08 Paul MackerrasImprove architectural compliance of mfspr and mtspr
2020-05-08 Paul MackerrasImplement the extswsli instruction
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