src/bsv/Makefile.peripherals.template

   1 ### Makefile for the cclass project
   2
   3 TOP_MODULE:=mkslow_peripherals
   4 TOP_FILE:=slow_peripherals.bsv
   5 TOP_DIR:=./
   6 WORKING_DIR := $(shell pwd)
   7
   8 BSVINCDIR:= .:%/Prelude:%/Libraries:%/Libraries/BlueNoC:
   9 BSVINCDIR:= $(BSVINCDIR):../../../shakti-core/src/core
  10 BSVINCDIR:= $(BSVINCDIR):../../../shakti-core/src/core/fpu
  11 BSVINCDIR:= $(BSVINCDIR):../../../shakti-core/src/lib
  12 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/core
  13 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/uncore/axi4
  14 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/uncore/axi4lite
  15 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/uncore/debug
  16 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/lib
  17 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/gpio
  18 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/rgbttl
  19 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/i2c
  20 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/mux
  21 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/plic
  22 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/clint
  23 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/sdram
  24 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/pwm
  25 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/qspi
  26 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/spi
  27 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/sdmmc
  28 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/emmc
  29 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/flexbus
  30 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/jtagdtm
  31 BSVINCDIR:= $(BSVINCDIR):../../../shakti-peripherals/src/peripherals/uart
  32
  33 default: gen_verilog
  34
  35 check-blue:
  36         @if test -z "$$BLUESPECDIR"; then echo "BLUESPECDIR variable not set"; exit 1; fi;
  37
  38 ###### Setting the variables for bluespec compile #$############################
  39 BSVCOMPILEOPTS:= -check-assert -suppress-warnings G0020 -keep-fires -opt-undetermined-vals -remove-false-rules -remove-empty-rules -remove-starved-rules
  40 BSVLINKOPTS:=-parallel-sim-link 8 -keep-fires
  41 VERILOGDIR:=./verilog/
  42 BSVBUILDDIR:=./bsv_build/
  43 BSVOUTDIR:=./bin
  44 ################################################################################
  45
  46 ########## BSIM COMPILE, LINK AND SIMULATE TARGETS ##########################
  47 .PHONY: check-restore
  48 check-restore:
  49         @if [ "$(define_macros)" != "$(old_define_macros)" ];   then    make clean ;    fi;
  50
  51 .PHONY: gen_verilog
  52 gen_verilog: check-restore check-blue
  53         @echo Compiling mkTbSoc in Verilog for simulations ...
  54         @mkdir -p $(BSVBUILDDIR);
  55         @mkdir -p $(VERILOGDIR);
  56         bsc -u -verilog -elab -vdir $(VERILOGDIR) -bdir $(BSVBUILDDIR) \
  57                 -info-dir $(BSVBUILDDIR) $(define_macros) \
  58                 -D RV64=True -D muldiv=True -D sequential=True \
  59                 -D atomic=True -D spfpu=True -D dpfpu=True \
  60                 -D bpu=True -D MMU=True -D perf=True \
  61                 -D prefetch=True -D CLINT=True \
  62                 -D      simulate=True -D SDRAM=True \
  63                 -D GPIO_MUX=True \
  64                 -D verilog=True $(BSVCOMPILEOPTS) -verilog-filter \
  65                 ${BLUESPECDIR}/bin/basicinout -p $(BSVINCDIR) \
  66                 -g $(TOP_MODULE) $(TOP_DIR)/$(TOP_FILE) \
  67                 2>&1 | tee bsv_compile.log
  68         @echo Compilation finished
  69
  70 #############################################################################
  71
  72 .PHONY: clean
  73 clean:
  74         rm -rf $(BSVBUILDDIR) *.log $(BSVOUTDIR) ./bbl*
  75         rm -rf verilog obj_dir bsv_src