src/bsv/bsv_lib/slow-peripherals.bsv

   1 package slow_peripherals;
   2         /*===== Project imports =====*/
   3         import defined_types::*;
   4         import AXI4_Lite_Fabric::*;
   5         import AXI4_Lite_Types::*;
   6         import AXI4_Fabric::*;
   7         import AXI4_Types::*;
   8         import Semi_FIFOF::*;
   9         import AXI4Lite_AXI4_Bridge::*;
  10         `include "defined_parameters.bsv"
  11         /*===========================*/
  12         /*=== package imports ===*/
  13         import Clocks::*;
  14         import GetPut::*;
  15         import ClientServer::*;
  16         import Connectable::*;
  17         import Vector::*;
  18         import FIFO::*;
  19         /*=======================*/
  20         /*===== Import the slow peripherals ====*/
  21         `ifdef UART0
  22                 import Uart16550                 :: *;
  23         `endif
  24         `ifdef UART1
  25                 import Uart_bs::*;
  26                 import RS232_modified::*;
  27         `endif
  28         `ifdef CLINT
  29                 import clint::*;
  30         `endif
  31         `ifdef PLIC
  32                 import gpio                             ::*;
  33                 import plic                             ::*;
  34         `endif
  35         `ifdef I2C0
  36                 import I2C_top                   :: *;
  37         `endif
  38         `ifdef QSPI0
  39                 import qspi                              :: *;
  40         `endif
  41         `ifdef AXIEXP
  42                 import axiexpansion     ::*;
  43         `endif
  44   `ifdef PWM_AXI4Lite
  45     import pwm::*;
  46   `endif
  47   // NEEL EDIT
  48   import pinmux::*;
  49   import mux::*;
  50         /*=====================================*/
  51
  52         /*===== interface declaration =====*/
  53         interface SP_ios;
  54                 `ifdef UART0
  55                         interface RS232_PHY_Ifc uart0_coe;
  56                 `endif
  57                 `ifdef UART1
  58                         interface RS232 uart1_coe;
  59                 `endif
  60                 `ifdef PLIC
  61                         (*always_ready,always_enabled*)
  62                         method Action gpio_in (Vector#(`IONum,Bit#(1)) inp);
  63                         (*always_ready,always_enabled*)
  64                         method Vector#(`IONum,Bit#(1))   gpio_out;
  65                         (*always_ready,always_enabled*)
  66                         method Vector#(`IONum,Bit#(1))   gpio_out_en;
  67                 `endif
  68                 `ifdef I2C0
  69                         interface I2C_out i2c0_out;
  70                 `endif
  71                 `ifdef I2C1
  72                         interface I2C_out i2c1_out;
  73                 `endif
  74                 `ifdef QSPI0
  75                         interface QSPI_out qspi0_out;
  76                 `endif
  77       `ifdef QSPI1
  78                         interface QSPI_out qspi1_out;
  79                 `endif
  80                 `ifdef AXIEXP
  81                         interface Get#(Bit#(67)) axiexp1_out;
  82                         interface Put#(Bit#(67)) axiexp1_in;
  83                 `endif
  84     `ifdef PWM_AXI4Lite
  85       interface PWMIO pwm_o;
  86     `endif
  87         endinterface
  88         interface Ifc_slow_peripherals;
  89                 interface AXI4_Slave_IFC#(`PADDR,`Reg_width,`USERSPACE) axi_slave;
  90                 interface SP_ios slow_ios;
  91                 `ifdef CLINT
  92                         method Bit#(1) msip_int;
  93                         method Bit#(1) mtip_int;
  94                         method Bit#(`Reg_width) mtime;
  95                 `endif
  96                 `ifdef PLIC method ActionValue#(Tuple2#(Bool,Bool)) intrpt_note; `endif
  97                 `ifdef I2C0     method Bit#(1) i2c0_isint; `endif
  98                 `ifdef I2C1     method Bit#(1) i2c1_isint; `endif
  99                 `ifdef QSPI0 method Bit#(1) qspi0_isint; `endif
 100                 `ifdef QSPI1 method Bit#(1) qspi1_isint; `endif
 101                 `ifdef UART0 method Bit#(1) uart0_intr; `endif
 102     // NEEL EDIT
 103     interface IOCellSide iocell_side; // mandatory interface
 104     interface GPIO_config#(3) pad_configa; // depends on the number of banks
 105     // NEEL EDIT OVER
 106         endinterface
 107         /*================================*/
 108
 109         function Tuple2#(Bool, Bit#(TLog#(Num_Slow_Slaves))) fn_address_mapping (Bit#(`PADDR) addr);
 110                 `ifdef UART0
 111                         if(addr>=`UART0Base && addr<=`UART0End)
 112                                 return tuple2(True,fromInteger(valueOf(Uart0_slave_num)));
 113                         else
 114                 `endif
 115                 `ifdef UART1
 116                         if(addr>=`UART1Base && addr<=`UART1End)
 117                                 return tuple2(True,fromInteger(valueOf(Uart1_slave_num)));
 118                         else
 119                 `endif
 120                 `ifdef CLINT
 121                         if(addr>=`ClintBase && addr<=`ClintEnd)
 122                                 return tuple2(True,fromInteger(valueOf(CLINT_slave_num)));
 123                         else
 124                 `endif
 125                 `ifdef PLIC
 126                         if(addr>=`PLICBase && addr<=`PLICEnd)
 127                                 return tuple2(True,fromInteger(valueOf(Plic_slave_num)));
 128                         else if(addr>=`GPIOBase && addr<=`GPIOEnd)
 129                                 return tuple2(True,fromInteger(valueOf(GPIO_slave_num)));
 130                         else
 131                 `endif
 132                 `ifdef I2C0
 133                         if(addr>=`I2C0Base && addr<=`I2C0End)
 134                                 return tuple2(True,fromInteger(valueOf(I2c0_slave_num)));
 135                         else
 136                 `endif
 137                 `ifdef I2C1
 138                         if(addr>=`I2C1Base && addr<=`I2C1End)
 139                                 return tuple2(True,fromInteger(valueOf(I2c1_slave_num)));
 140                         else
 141                 `endif
 142                 `ifdef QSPI0
 143                         if(addr>=`QSPI0CfgBase && addr<=`QSPI0CfgEnd)
 144                                 return tuple2(True,fromInteger(valueOf(Qspi0_slave_num)));
 145                         else if(addr>=`QSPI0MemBase && addr<=`QSPI0MemEnd)
 146                                 return tuple2(True,fromInteger(valueOf(Qspi0_slave_num)));
 147                         else
 148                 `endif
 149                 `ifdef QSPI1
 150                         if(addr>=`QSPI1CfgBase && addr<=`QSPI1CfgEnd)
 151                                 return tuple2(True,fromInteger(valueOf(Qspi1_slave_num)));
 152                         else if(addr>=`QSPI1MemBase && addr<=`QSPI1MemEnd)
 153                                 return tuple2(True,fromInteger(valueOf(Qspi1_slave_num)));
 154                         else
 155                 `endif
 156                 `ifdef AXIEXP
 157                         if(addr>=`AxiExp1Base && addr<=`AxiExp1End)
 158                                 return tuple2(True,fromInteger(valueOf(AxiExp1_slave_num)));
 159                         else
 160                 `endif
 161     `ifdef PWM_AXI4Lite
 162       if(addr>=`PWMBase && addr<=`PWMEnd)
 163         return tuple2(True,fromInteger(valueOf(Pwm_slave_num)));
 164       else
 165     `endif
 166
 167     // NEEL EDIT
 168       // give slave number and adress map to whatever peripherals you instantiate on the AXI4_Lite
 169       // slave.
 170     // NEEL EDIT OVER
 171                 return tuple2(False,?);
 172         endfunction
 173
 174         (*synthesize*)
 175         module mkslow_peripherals#(Clock fast_clock, Reset fast_reset, Clock uart_clock, Reset uart_reset
 176   `ifdef PWM_AXI4Lite ,Clock ext_pwm_clock `endif )(Ifc_slow_peripherals);
 177                 Clock sp_clock <-exposeCurrentClock; // slow peripheral clock
 178                 Reset sp_reset <-exposeCurrentReset; // slow peripheral reset
 179
 180                 /*======= Module declarations for each peripheral =======*/
 181                 `ifdef UART0
 182                         Uart16550_AXI4_Lite_Ifc uart0 <- mkUart16550(clocked_by uart_clock, reset_by uart_reset, sp_clock, sp_reset);
 183                 `endif
 184                 `ifdef UART1
 185                         Ifc_Uart_bs uart1 <- mkUart_bs(clocked_by uart_clock, reset_by uart_reset,sp_clock, sp_reset);
 186                 `endif
 187                 `ifdef CLINT
 188                         Ifc_clint                               clint                           <- mkclint();
 189                 `endif
 190                 `ifdef PLIC
 191                         Ifc_PLIC_AXI    plic <- mkplicperipheral();
 192          Wire#(Bit#(TLog#(`INTERRUPT_PINS))) interrupt_id <- mkWire();
 193                         Vector#(`INTERRUPT_PINS, FIFO#(bit)) ff_gateway_queue <- replicateM(mkFIFO);
 194                         GPIO                                            gpio                            <- mkgpio;
 195                 `endif
 196                 `ifdef I2C0
 197                         I2C_IFC                                 i2c0                            <- mkI2CController();
 198                 `endif
 199                 `ifdef I2C1
 200                         I2C_IFC                                 i2c1                            <- mkI2CController();
 201                 `endif
 202                 `ifdef QSPI0
 203                         Ifc_qspi                        qspi0                           <-      mkqspi();
 204                 `endif
 205                 `ifdef QSPI1
 206                         Ifc_qspi                        qspi1                           <-      mkqspi();
 207                 `endif
 208                 `ifdef AXIEXP
 209                         Ifc_AxiExpansion                axiexp1                 <- mkAxiExpansion();
 210                 `endif
 211     `ifdef PWM_AXI4Lite
 212       Ifc_PWM_bus pwm_bus <- mkPWM_bus(ext_pwm_clock);
 213     `endif
 214     // NEEL EDIT
 215     Ifc_pinmux pinmux <- mkpinmux; // mandatory
 216     MUX#(3) mymux <- mkmux(); // mandatory. number depends on the number of instances required.
 217     GPIO#(3) mygpioa <- mkgpio(); // optional. depends the number of IO pins declared before.
 218     // NEEL EDIT OVER
 219                 /*=======================================================*/
 220
 221         AXI4_Lite_Fabric_IFC #(1, Num_Slow_Slaves, `PADDR, `Reg_width,`USERSPACE)       slow_fabric <-
 222                                                             mkAXI4_Lite_Fabric(fn_address_mapping);
 223                 Ifc_AXI4Lite_AXI4_Bridge bridge <-mkAXI4Lite_AXI4_Bridge(fast_clock,fast_reset);
 224
 225                 mkConnection (bridge.axi4_lite_master,  slow_fabric.v_from_masters [0]);
 226                 /*======= Slave connections to AXI4Lite fabric =========*/
 227                 `ifdef UART0
 228                         mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(Uart0_slave_num))],
 229                     uart0.slave_axi_uart);
 230                 `endif
 231                 `ifdef UART1
 232                 mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(Uart1_slave_num))],
 233                     uart1.slave_axi_uart);
 234                 `endif
 235                 `ifdef CLINT
 236                         mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(CLINT_slave_num))],
 237                     clint.axi4_slave);
 238                 `endif
 239                 `ifdef PLIC
 240                         mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(Plic_slave_num))],
 241                     plic.axi4_slave_plic); //
 242                         mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(GPIO_slave_num))],
 243                     gpio.axi_slave); //
 244                 `endif
 245                 `ifdef I2C0
 246                 mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(I2c0_slave_num))],
 247                     i2c0.slave_i2c_axi);
 248                 `endif
 249                 `ifdef I2C1
 250                 mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(I2c1_slave_num))],
 251                     i2c1.slave_i2c_axi); //
 252                 `endif
 253                 `ifdef QSPI0
 254                         mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(Qspi0_slave_num))],
 255                     qspi0.slave);
 256                 `endif
 257                 `ifdef QSPI1
 258                         mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(Qspi1_slave_num))],
 259                     qspi1.slave);
 260                 `endif
 261                 `ifdef AXIEXP
 262                 mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(AxiExp1_slave_num))],
 263                     axiexp1.axi_slave); //
 264                 `endif
 265     `ifdef PWM_AXI4Lite
 266       mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(Pwm_slave_num))],
 267                     pwm_bus.axi4_slave);
 268     `endif
 269
 270     // NEEL EDIT
 271     mkConnection (slow_fabric.v_from_masters[/* mux slave number*/], mymux.axi_slave);
 272     mkConnection (slow_fabric.v_from_masters[/* gpioslave number*/], gpioa.axi_slave);
 273     rule connect_select_lines_pinmux;// mandatory
 274       pinmux.cell0_mux(mymux.mux_config[0]);
 275       pinmux.cell1_mux(mymux.mux_config[1]);
 276       pinmux.cell2_mux(mymux.mux_config[2]);
 277     endrule
 278     rule connect_uart1tx;
 279       pinmux.peripheral_side.uart_tx(uart1.coe_rs232.rs232.sout);
 280     endrule
 281     rule connect_uart1rx;
 282       uart1.coe_rs232.rs232.sin(pinmux.peripheral_side.uart_rx);
 283     endrule
 284     rule connect_gpioa
 285       pinmux.peripheral_side.gpioa_a0_out(gpio.func.gpio_out[0]);
 286       pinmux.peripheral_side.gpioa_a0_outen(gpio.func.gpio_out_en[0]);
 287                 Vector#(3,Bit#(1)) temp;
 288                 temp[0]=pinmux.peripheral_side.gpioa_a0_in;
 289                 temp[1]=pinmux.peripheral_side.gpioa_a1_in;
 290                 temp[2]=pinmux.peripheral_side.gpioa_a2_in;
 291       gpio.pad_config.gpio_in(temp);
 292     endrule
 293     // NEEL EDIT OVER
 294                 /*=======================================================*/
 295                 /*=================== PLIC Connections ==================== */
 296                 `ifdef PLIC
 297                         /*TODO DMA interrupt need to be connected to the plic
 298                         for(Integer i=1; i<8; i=i+1) begin
 299          `ifdef DMA
 300              rule rl_connect_dma_interrupts_to_plic;
 301                                         if(dma.interrupt_to_processor[i-1]==1'b1) begin
 302                                                 ff_gateway_queue[i].enq(1);
 303                                                 plic.ifc_external_irq[i].irq_frm_gateway(True);
 304                                         end
 305              endrule
 306           `else
 307              rule rl_connect_dma_interrupts_to_plic;
 308                  ff_gateway_queue[i].enq(0);
 309              endrule
 310           `endif
 311          end
 312                         */
 313          rule rl_connect_i2c0_to_plic;
 314                                 `ifdef I2C0
 315                                         if(i2c0.isint()==1'b1) begin
 316                                                 ff_gateway_queue[8].enq(1);
 317                                                 plic.ifc_external_irq[8].irq_frm_gateway(True);
 318                                         end
 319                                 `else
 320                                         ff_gateway_queue[8].enq(0);
 321             `endif
 322          endrule
 323
 324                         rule rl_connect_i2c1_to_plic;
 325                                 `ifdef I2C1
 326                                         if(i2c1.isint()==1'b1) begin
 327                                                 ff_gateway_queue[9].enq(1);
 328                                                 plic.ifc_external_irq[9].irq_frm_gateway(True);
 329                                         end
 330             `else
 331                                         ff_gateway_queue[9].enq(0);
 332             `endif
 333                         endrule
 334
 335          rule rl_connect_i2c0_timerint_to_plic;
 336                                 `ifdef I2C0
 337                                         if(i2c0.timerint()==1'b1) begin
 338                                                 ff_gateway_queue[10].enq(1);
 339                                                 plic.ifc_external_irq[10].irq_frm_gateway(True);
 340                                         end
 341             `else
 342                                         ff_gateway_queue[10].enq(0);
 343             `endif
 344                         endrule
 345
 346          rule rl_connect_i2c1_timerint_to_plic;
 347                                 `ifdef I2C1
 348                                         if(i2c1.timerint()==1'b1) begin
 349                                                 ff_gateway_queue[11].enq(1);
 350                                                 plic.ifc_external_irq[11].irq_frm_gateway(True);
 351                                         end
 352             `else
 353                                         ff_gateway_queue[11].enq(0);
 354             `endif
 355          endrule
 356
 357          rule rl_connect_i2c0_isber_to_plic;
 358                                 `ifdef I2C0
 359                                         if(i2c0.isber()==1'b1) begin
 360                                                 ff_gateway_queue[12].enq(1);
 361                                                 plic.ifc_external_irq[12].irq_frm_gateway(True);
 362                                         end
 363             `else
 364                                         ff_gateway_queue[12].enq(0);
 365             `endif
 366          endrule
 367
 368          rule rl_connect_i2c1_isber_to_plic;
 369                                 `ifdef I2C1
 370                                         if(i2c1.isber()==1'b1) begin
 371                                                 ff_gateway_queue[13].enq(1);
 372                                                 plic.ifc_external_irq[13].irq_frm_gateway(True);
 373                end
 374             `else
 375                                         ff_gateway_queue[13].enq(0);
 376             `endif
 377          endrule
 378
 379          for(Integer i = 14; i < 20; i=i+1) begin
 380                                 rule rl_connect_qspi0_to_plic;
 381                                         `ifdef QSPI0
 382                                                 if(qspi0.interrupts()[i-14]==1'b1) begin
 383                                                         ff_gateway_queue[i].enq(1);
 384                                                         plic.ifc_external_irq[i].irq_frm_gateway(True);
 385                                                 end
 386                `else
 387                                                 ff_gateway_queue[i].enq(0);
 388                `endif
 389             endrule
 390          end
 391
 392          for(Integer i = 20; i<26; i=i+1) begin
 393                                 rule rl_connect_qspi1_to_plic;
 394                                         `ifdef QSPI1
 395                                                 if(qspi1.interrupts()[i-20]==1'b1) begin
 396                                                         ff_gateway_queue[i].enq(1);
 397                                                         plic.ifc_external_irq[i].irq_frm_gateway(True);
 398                                                 end
 399                `else
 400                                                 ff_gateway_queue[i].enq(0);
 401                `endif
 402             endrule
 403                         end
 404
 405                         `ifdef UART0
 406                                 SyncBitIfc#(Bit#(1)) uart0_interrupt <-mkSyncBitToCC(uart_clock,uart_reset);
 407                                 rule synchronize_the_uart0_interrupt;
 408                                         uart0_interrupt.send(uart0.irq);
 409                                 endrule
 410                         `endif
 411                         rule rl_connect_uart_to_plic;
 412                                 `ifdef UART0
 413                                         if(uart0_interrupt.read==1'b1) begin
 414                                                 ff_gateway_queue[27].enq(1);
 415                                                 plic.ifc_external_irq[27].irq_frm_gateway(True);
 416                end
 417
 418             `else
 419                                         ff_gateway_queue[27].enq(0);
 420             `endif
 421          endrule
 422
 423                         for(Integer i = 28; i<`INTERRUPT_PINS; i=i+1) begin
 424                                 rule rl_raise_interrupts;
 425                                         if((i-28)<`IONum) begin //Peripheral interrupts
 426                                                 if(gpio.to_plic[i-28]==1'b1) begin
 427                                                         plic.ifc_external_irq[i].irq_frm_gateway(True);
 428                                                                 ff_gateway_queue[i].enq(1);
 429                   end
 430                                         end
 431                                 endrule
 432                         end
 433
 434          rule rl_completion_msg_from_plic;
 435                                 let id <- plic.intrpt_completion;
 436             interrupt_id <= id;
 437             `ifdef verbose $display("Dequeing the FIFO -- PLIC Interrupt Serviced id: %d",id); `endif
 438                         endrule
 439
 440          for(Integer i=0; i <`INTERRUPT_PINS; i=i+1) begin
 441                                 rule deq_gateway_queue;
 442                                         if(interrupt_id==fromInteger(i)) begin
 443                                                 ff_gateway_queue[i].deq;
 444                   `ifdef $display($time,"Dequeing the Interrupt request for ID: %d",i); `endif
 445                end
 446             endrule
 447          end
 448
 449
 450                 `endif
 451                         /*======================================================= */
 452
 453                 /* ===== interface definition =======*/
 454                 interface axi_slave=bridge.axi_slave;
 455                 `ifdef PLIC method intrpt_note = plic.intrpt_note; `endif
 456                 `ifdef CLINT
 457                         method msip_int=clint.msip_int;
 458                         method mtip_int=clint.mtip_int;
 459                         method mtime=clint.mtime;
 460                 `endif
 461                 `ifdef I2C0
 462                         method i2c0_isint=i2c0.isint;
 463                 `endif
 464                 `ifdef I2C1
 465                         method i2c1_isint=i2c1.isint;
 466                 `endif
 467                 `ifdef QSPI0 method     qspi0_isint=qspi0.interrupts[5]; `endif
 468                 `ifdef QSPI1 method     qspi1_isint=qspi1.interrupts[5]; `endif
 469                 `ifdef UART0 method uart0_intr=uart0.irq; `endif
 470                 interface SP_ios slow_ios;
 471                         `ifdef UART0
 472                                 interface uart0_coe=uart0.coe_rs232;
 473                         `endif
 474                         `ifdef UART1
 475                                 interface uart1_coe=uart1.coe_rs232;
 476                         `endif
 477                         `ifdef PLIC
 478                                 method Action gpio_in (Vector#(`IONum,Bit#(1)) inp)=gpio.gpio_in(inp);
 479                                 method Vector#(`IONum,Bit#(1))   gpio_out=gpio.gpio_out;
 480                                 method Vector#(`IONum,Bit#(1))   gpio_out_en=gpio.gpio_out_en;
 481                         `endif
 482                         `ifdef I2C0
 483                                 interface i2c0_out=i2c0.out;
 484                         `endif
 485                         `ifdef I2C1
 486                                 interface i2c1_out=i2c1.out;
 487                         `endif
 488                         `ifdef QSPI0
 489                                 interface qspi0_out = qspi0.out;
 490                         `endif
 491                         `ifdef QSPI1
 492                                 interface qspi1_out = qspi1.out;
 493                         `endif
 494                         `ifdef AXIEXP
 495                                 interface axiexp1_out=axiexp1.slave_out;
 496                                 interface axiexp1_in=axiexp1.slave_in;
 497                         `endif
 498       `ifdef PWM_AXI4Lite
 499         interface pwm_o = pwm_bus.pwm_io;
 500       `endif
 501                 endinterface
 502     // NEEL EDIT
 503     interface iocell_side=pinmux.iocell_side;
 504     interface pad_configa= gpioa.pad_config;
 505     // NEEL EDIT OVER
 506                 /*===================================*/
 507         endmodule
 508 endpackage