4 from UserDict
import UserDict
6 from collections
import UserDict
8 from bsv
.wire_def
import generic_io
# special case
9 from bsv
.wire_def
import muxwire
# special case
13 """ pin interface declaration.
14 * name is the name of the pin
15 * ready, enabled and io all create a (* .... *) prefix
16 * action changes it to an "in" if true
19 def __init__(self
, name
,
27 self
.enabled
= enabled
30 self
.bitspec
= bitspec
if bitspec
else 'Bit#(1)'
32 def ifacefmt(self
, fmtfn
=None):
36 status
.append('always_ready')
38 status
.append('always_enabled')
40 status
.append('result="io"')
43 res
+= ','.join(status
)
48 name
= fmtfn(self
.name
)
52 res
+= ' (%s in)' % self
.bitspec
54 res
+= " %s " % self
.bitspec
59 def ifacedef(self
, fmtoutfn
=None, fmtinfn
=None, fmtdecfn
=None):
62 fmtname
= fmtinfn(self
.name
)
64 res
+= fmtdecfn(self
.name
)
65 res
+= '(%s in);\n' % self
.bitspec
66 res
+= ' %s<=in;\n' % fmtname
69 fmtname
= fmtoutfn(self
.name
)
70 res
+= "%s=%s;" % (self
.name
, fmtname
)
73 def wirefmt(self
, fmtoutfn
=None, fmtinfn
=None, fmtdecfn
=None):
74 res
= ' Wire#(%s) ' % self
.bitspec
76 res
+= '%s' % fmtinfn(self
.name
)
78 res
+= '%s' % fmtoutfn(self
.name
)
79 res
+= "<-mkDWire(0);"
83 class Interface(object):
84 """ create an interface from a list of pinspecs.
85 each pinspec is a dictionary, see Pin class arguments
86 single indicates that there is only one of these, and
87 so the name must *not* be extended numerically (see pname)
90 def __init__(self
, ifacename
, pinspecs
, ganged
=None, single
=False):
91 self
.ifacename
= ifacename
92 self
.ganged
= ganged
or {}
94 self
.pinspecs
= pinspecs
99 if p
.get('outen') is True: # special case, generate 3 pins
101 for psuffix
in ['out', 'outen', 'in']:
102 _p
['name'] = "%s_%s" % (self
.pname(p
['name']), psuffix
)
103 _p
['action'] = psuffix
!= 'in'
104 self
.pins
.append(Pin(**_p
))
106 _p
['name'] = self
.pname(p
['name'])
107 self
.pins
.append(Pin(**_p
))
109 def getifacetype(self
, name
):
110 for p
in self
.pinspecs
:
111 fname
= "%s_%s" % (self
.ifacename
, p
['name'])
112 #print "search", self.ifacename, name, fname
121 def pname(self
, name
):
122 """ generates the interface spec e.g. flexbus_ale
123 if there is only one flexbus interface, or
124 sd{0}_cmd if there are several. string format
125 function turns this into sd0_cmd, sd1_cmd as
126 appropriate. single mode stops the numerical extension.
129 return '%s_%s' % (self
.ifacename
, name
)
130 return '%s{0}_%s' % (self
.ifacename
, name
)
132 def busfmt(self
, *args
):
133 """ this function creates a bus "ganging" system based
134 on input from the {interfacename}.txt file.
135 only inout pins that are under the control of the
136 interface may be "ganged" together.
142 for (k
, pnames
) in self
.ganged
.items():
143 name
= self
.pname('%senable' % k
).format(*args
)
144 decl
= 'Bit#(1) %s = 0;' % name
147 for p
in self
.pinspecs
:
148 if p
['name'] not in pnames
:
150 pname
= self
.pname(p
['name']).format(*args
)
151 if p
.get('outen') is True:
152 outname
= self
.ifacefmtoutfn(pname
)
153 ganged
.append("%s_outen" % outname
) # match wirefmt
155 gangedfmt
= '{%s} = duplicate(%s);'
156 res
.append(gangedfmt
% (',\n '.join(ganged
), name
))
157 return '\n'.join(res
) + '\n\n'
159 def wirefmt(self
, *args
):
160 res
= '\n'.join(map(self
.wirefmtpin
, self
.pins
)).format(*args
)
162 for p
in self
.pinspecs
:
163 name
= self
.pname(p
['name'])
164 typ
= self
.getifacetype(name
.format(""))
165 name
= name
.format(*args
)
166 res
+= " # declare %s_io, set up as type '%s'\n" % (name
, typ
)
167 res
+= " GenericIOType %s_io = GenericIOType{\n" % name
170 outname
= self
.ifacefmtoutfn(name
)
171 params
.append('outputval:%s_out,' % outname
)
172 params
.append('output_en:%s_outen,' % outname
) # match busfmt
173 params
.append('input_en:~%s_outen,' % outname
)
175 outname
= self
.ifacefmtoutfn(name
)
176 params
.append('outputval:%s,' % outname
)
177 params
.append('output_en:1,')
178 params
.append('input_en:0,')
180 params
.append('outputval:0,')
181 params
.append('output_en:0,')
182 params
.append('input_en:1,')
183 params
+= ['pullup_en:0,', 'pulldown_en:0,',
184 'pushpull_en:0,', 'drivestrength:0,',
187 res
+= ' %s\n' % param
191 def ifacefmt(self
, *args
):
192 res
= '\n'.join(map(self
.ifacefmtdecpin
, self
.pins
)).format(*args
)
195 def ifacefmtdecfn(self
, name
):
198 def ifacefmtdecfn2(self
, name
):
201 def ifacefmtoutfn(self
, name
):
204 def ifacefmtinfn(self
, name
):
207 def wirefmtpin(self
, pin
):
208 return pin
.wirefmt(self
.ifacefmtoutfn
, self
.ifacefmtinfn
,
211 def ifacefmtdecpin(self
, pin
):
212 return pin
.ifacefmt(self
.ifacefmtdecfn
)
214 def ifacefmtpin(self
, pin
):
215 return pin
.ifacedef(self
.ifacefmtoutfn
, self
.ifacefmtinfn
,
218 def ifacedef(self
, *args
):
219 res
= '\n'.join(map(self
.ifacefmtpin
, self
.pins
))
220 res
= res
.format(*args
)
221 return '\n' + res
+ '\n'
224 class MuxInterface(Interface
):
226 def wirefmt(self
, *args
):
227 return muxwire
.format(*args
)
230 class IOInterface(Interface
):
232 def ifacefmtoutfn(self
, name
):
233 """ for now strip off io{0}_ part """
234 return "cell{0}_mux_out"
236 def ifacefmtinfn(self
, name
):
237 return "cell{0}_mux_in"
239 def wirefmt(self
, *args
):
240 return generic_io
.format(*args
)
243 class Interfaces(UserDict
):
244 """ contains a list of interface definitions
247 def __init__(self
, pth
):
250 UserDict
.__init
__(self
, {})
251 ift
= 'interfaces.txt'
253 ift
= os
.path
.join(pth
, ift
)
254 with
open(ift
, 'r') as ifile
:
255 for ln
in ifile
.readlines():
260 spec
, ganged
= self
.read_spec(pth
, name
)
261 iface
= Interface(name
, spec
, ganged
, count
== 1)
262 self
.ifaceadd(name
, count
, iface
)
264 def getifacetype(self
, fname
):
265 # finds the interface type, e.g sd_d0 returns "inout"
266 for iface
in self
.values():
267 typ
= iface
.getifacetype(fname
)
272 def ifaceadd(self
, name
, count
, iface
, at
=None):
274 at
= len(self
.ifacecount
)
275 self
.ifacecount
.insert(at
, (name
, count
))
278 def read_spec(self
, pth
, name
):
281 fname
= '%s.txt' % name
283 ift
= os
.path
.join(pth
, fname
)
284 with
open(ift
, 'r') as sfile
:
285 for ln
in sfile
.readlines():
292 elif ln
[1] == 'inout':
296 if bus
not in ganged
:
298 ganged
[bus
].append(name
)
302 def ifacedef(self
, f
, *args
):
303 for (name
, count
) in self
.ifacecount
:
304 for i
in range(count
):
305 f
.write(self
.data
[name
].ifacedef(i
))
307 def busfmt(self
, f
, *args
):
308 f
.write("import BUtils::*;\n\n")
309 for (name
, count
) in self
.ifacecount
:
310 for i
in range(count
):
311 bf
= self
.data
[name
].busfmt(i
)
314 def ifacefmt(self
, f
, *args
):
316 // interface declaration between %s-{0} and pinmux'''
317 for (name
, count
) in self
.ifacecount
:
318 for i
in range(count
):
319 c
= comment
% name
.upper()
321 f
.write(self
.data
[name
].ifacefmt(i
))
323 def wirefmt(self
, f
, *args
):
324 comment
= '\n // following wires capture signals ' \
325 'to IO CELL if %s-{0} is\n' \
327 for (name
, count
) in self
.ifacecount
:
328 for i
in range(count
):
331 f
.write(self
.data
[name
].wirefmt(i
))
334 # ========= Interface declarations ================ #
336 mux_interface
= MuxInterface('cell', [{'name': 'mux', 'ready': False,
338 'bitspec': '{1}', 'action': True}])
340 io_interface
= IOInterface(
342 [{'name': 'cell', 'enabled': False, 'bitspec': 'GenericIOType'},
343 {'name': 'inputval', 'action': True, 'io': True}, ])
345 # == Peripheral Interface definitions == #
346 # these are the interface of the peripherals to the pin mux
347 # Outputs from the peripherals will be inputs to the pinmux
348 # module. Hence the change in direction for most pins
350 # ======================================= #
353 if __name__
== '__main__':
355 uartinterface_decl
= Interface('uart',
357 {'name': 'tx', 'action': True},
360 twiinterface_decl
= Interface('twi',
361 [{'name': 'sda', 'outen': True},
362 {'name': 'scl', 'outen': True},
365 def _pinmunge(p
, sep
, repl
, dedupe
=True):
366 """ munges the text so it's easier to compare.
367 splits by separator, strips out blanks, re-joins.
372 p
= filter(lambda x
: x
, p
) # filter out blanks
376 """ munges the text so it's easier to compare.
378 # first join lines by semicolons, strip out returns
380 p
= map(lambda x
: x
.replace('\n', ''), p
)
382 # now split first by brackets, then spaces (deduping on spaces)
383 p
= _pinmunge(p
, "(", " ( ", False)
384 p
= _pinmunge(p
, ")", " ) ", False)
385 p
= _pinmunge(p
, " ", " ")
391 for p1
, p2
in zip(l1
, l2
):
397 ifaces
= Interfaces()
399 ifaceuart
= ifaces
['uart']
400 print (ifaceuart
.ifacedef(0))
401 print (uartinterface_decl
.ifacedef(0))
402 assert ifaceuart
.ifacedef(0) == uartinterface_decl
.ifacedef(0)
404 ifacetwi
= ifaces
['twi']
405 print (ifacetwi
.ifacedef(0))
406 print (twiinterface_decl
.ifacedef(0))
407 assert ifacetwi
.ifacedef(0) == twiinterface_decl
.ifacedef(0)