comment out jtag clock sync for now
[pinmux.git] / src / bsv / peripheral_gen / jtag.py
1 from bsv.peripheral_gen.base import PBase
2
3
4 class jtag(PBase):
5
6 def slowimport(self):
7 return "import jtagdtm::*;\n"
8
9 def extfastifinstance(self, name, count):
10 return self._extifinstance(name, count, "_out", "", True)
11
12 def fastifdecl(self, name, count):
13 # YUK!
14 return "interface Ifc_jtagdtm jtag{0}_out;".format(count)
15
16 def get_clock_reset(self, name, count):
17 return "slow_clock, slow_reset"
18 # return "tck, trst"
19
20 def pinname_in(self, pname):
21 return {'tms': 'tms',
22 'tdi': 'tdi',
23 }.get(pname, '')
24
25 def pinname_out(self, pname):
26 return {'tck': 'tck',
27 'tdo': 'tdo',
28 }.get(pname, '')
29
30 def mkfast_peripheral(self):
31 return """\
32 Ifc_jtagdtm jtag{0} <-mkjtagdtm(clocked_by tck, reset_by trst);
33 rule drive_tmp_scan_outs;
34 jtag{0}.scan_out_1_i(1'b0);
35 jtag{0}.scan_out_2_i(1'b0);
36 jtag{0}.scan_out_3_i(1'b0);
37 jtag{0}.scan_out_4_i(1'b0);
38 jtag{0}.scan_out_5_i(1'b0);
39 endrule
40 """
41
42 def axi_slave_name(self, name, ifacenum, typ=None):
43 return ''
44
45 def axi_slave_idx(self, idx, name, ifacenum, typ):
46 return ('', 0)
47
48 def axi_addr_map(self, name, ifacenum, typ=None):
49 return ''