add sdram dual axi4 configs
[pinmux.git] / src / bsv / peripheral_gen / sdram.py
1 from bsv.peripheral_gen.base import PBase
2
3
4 class sdram(PBase):
5
6 def slowimport(self):
7 return "import sdr_top::*;"
8
9 def num_axi_regs32(self):
10 return [0x400000, # defines an entire memory range (hack...)
11 12] # defines the number of configuration regs
12
13 def extfastifinstance(self, name, count):
14 return "// TODO" + self._extifinstance(name, count, "_out", "", True,
15 ".if_sdram_out")
16
17 def fastifdecl(self, name, count):
18 return "// (*always_ready*) interface " + \
19 "Ifc_sdram_out sdr{0}_out;".format(count)
20
21 def get_clock_reset(self, name, count):
22 return "slow_clock, slow_reset"
23
24 def mkfast_peripheral(self):
25 return "Ifc_sdr_slave sdr{0} <- mksdr_axi4_slave(clk0);"
26
27 def _mk_connection(self, name=None, count=0):
28 return ["sdr{0}.axi4_slave_sdram",
29 "sdr{0}.axi4_slave_cntrl_reg"]
30
31
32 def pinname_in(self, pname):
33 return {'ta': 'sdram_side.m_tAn',
34 }.get(pname, '')
35
36 def pinname_out(self, pname):
37 return {'ale': 'sdram_side.m_ALE',
38 'oe': 'sdram_side.m_OEn',
39 'tbst': 'sdram_side.m_TBSTn',
40 'rw': 'sdram_side.m_R_Wn',
41 }.get(pname, '')
42
43 def _mk_clk_con(self, name, count, ctype):
44 ret = [PBase._mk_clk_con(self, name, count, ctype)]
45 for pname, sz, ptype in [
46 ('cs', 6, 'out'),
47 ('bwe', 4, 'out'),
48 ('tsiz', 2, 'out'),
49 ('ad_out', 32, 'out'),
50 ('ad_in', 32, 'in'),
51 ('ad_out_en', 32, 'out'),
52 ]:
53 bitspec = "Bit#(%d)" % sz
54 txt = self._mk_clk_vcon(name, count, ctype, ptype, pname, bitspec)
55 ret.append(txt)
56 return '\n'.join(ret)
57
58 def _mk_pincon(self, name, count, typ):
59 ret = [PBase._mk_pincon(self, name, count, typ)]
60 assert typ == 'fast' # TODO slow?
61 for pname, stype, ptype in [
62 ('cs', 'm_FBCSn', 'out'),
63 ('bwe', 'm_BWEn', 'out'),
64 ('tsiz', 'm_TSIZ', 'out'),
65 ('ad_out', 'm_AD', 'out'),
66 ('ad_in', 'm_din', 'in'),
67 ('ad_out_en', 'm_OE32n', 'out'),
68 ]:
69 ret.append(self._mk_vpincon(name, count, typ, ptype, pname,
70 "sdram_side.{0}".format(stype)))
71
72 return '\n'.join(ret)