add print debugs
[pinmux.git] / src / jsoncreate.py
1 from parse import Parse
2 from pprint import pprint
3 import json
4
5 # map pins to litex name conventions, primarily for use in coriolis2
6 # yes this is a mess. it'll do the job though. improvements later
7 def pinparse(psp, pinspec):
8 p = Parse(pinspec, verify=False)
9 pinmap = {}
10 litexmap = {}
11
12 print ("muxed cells", p.muxed_cells)
13 print ("muxed cell banks", p.muxed_cells_bank)
14
15 pads = {}
16 for pname, psize in p.bankwidths.items():
17 print ("pad name,size", pname, psize)
18 pads[pname] = [''] * psize
19
20 iopads = []
21 domains = {}
22 clocks = {}
23
24 n_intpower = 0
25 n_extpower = 0
26 for clist, bank in zip(p.muxed_cells, p.muxed_cells_bank):
27 print ("cell", clist, bank)
28 padnum = clist[0]
29 name = clist[1]
30 x = clist[2]
31 orig_name = name
32 litex_name = None
33 domain = None # TODO, get this from the PinSpec. sigh
34 padnum = int(padnum)
35 start = p.bankstart[bank]
36 banknum = padnum - start
37 print ("bank", bank, banknum, "padname", name, padnum, x)
38 padbank = pads[bank]
39 pad = None
40 # VSS
41 if name.startswith('vss'):
42 name = 'p_%s_' % name[:-2] + name[-1]
43 if 'i' in name:
44 name = 'ground_' + name[-1]
45 name2 = 'vss'
46 else:
47 name = 'ioground_' + name[-1]
48 name2 = 'iovss'
49 pad = [name, name2]
50 # VDD
51 elif name.startswith('vdd'):
52 if 'i' in name:
53 n_intpower += 1
54 name = 'power_' + name[-1]
55 name2 = 'vdd'
56 else:
57 n_extpower += 1
58 name = 'iopower_' + name[-1]
59 name2 = 'iovdd'
60 pad = [name, name2]
61 # SYS
62 elif name.startswith('sys'):
63 domain = 'SYS'
64 if name == 'sys_pllclk':
65 pad = ["p_"+name, name, name]
66 elif name == 'sys_rst':
67 #name = 'p_sys_rst_1'
68 pad = [name, name, name]
69 padbank[banknum] = name
70 print ("sys_rst add", bank, banknum, name)
71 name = None
72 elif name == 'sys_pllclk':
73 name = None # ignore
74 elif name == 'sys_pllvcout':
75 name = 'sys_pll_vco_o'
76 pad = ['p_' + name, name, name, "A"] # A for Analog
77 elif name == 'sys_plltestout':
78 name = 'sys_pll_testout_o'
79 pad = ['p_' + name, name, name]
80 elif name.startswith('sys_pllsel'):
81 i = name[-1]
82 name2 = 'sys_clksel_i(%s)' % i
83 name = 'p_sys_clksel_' + i
84 pad = [name, name2, name2]
85 #if name:
86 # iopads.append([pname, name, name])
87 print ("sys pad", name)
88 # SPI Card
89 elif name.startswith('mspi0') or name.startswith('mspi1'):
90 domain = 'MSPI'
91 suffix = name[6:]
92 if suffix == 'ck':
93 suffix = 'clk'
94 elif suffix == 'nss':
95 suffix = 'cs_n'
96 if name.startswith('mspi0'):
97 prefix = 'spimaster_'
98 else:
99 prefix = 'spisdcard_'
100 litex_name = name[:6] + suffix
101 name = prefix + suffix
102 pad = ['p_' + name, name, name]
103 # SD/MMC
104 elif name.startswith('sd0'):
105 domain = 'SD'
106 if name.startswith('sd0_d'):
107 i = name[5:]
108 name = 'sdcard_data' + i
109 name2 = 'sdcard_data_%%s(%s)' % i
110 pad = ['p_'+name, name, name2 % 'o', name2 % 'i', name2 % 'oe']
111 elif name.startswith('sd0_cmd'):
112 name = 'sdcard_cmd'
113 name2 = 'sdcard_cmd_%s'
114 pad = ['p_'+name, name, name2 % 'o', name2 % 'i', name2 % 'oe']
115 else:
116 name = 'sdcard_' + name[4:]
117 pad = ['p_' + name, name, name]
118 litex_name = orig_name[:4] + "_".join(name.split("_")[1:])
119 # SDRAM
120 elif name.startswith('sdr'):
121 domain = 'SDR'
122 if name == 'sdr_clk':
123 name = 'sdram_clock'
124 pad = ['p_' + name, name, name]
125 elif name.startswith('sdr_ad'):
126 i = name[6:]
127 name = 'sdram_a_' + i
128 name2 = 'sdram_a(%s)' % i
129 pad = ['p_' + name, name2, name2]
130 elif name.startswith('sdr_ba'):
131 i = name[-1]
132 name = 'sdram_ba_' + i
133 name2 = 'sdram_ba(%s)' % i
134 pad = ['p_' + name, name2, name2]
135 elif name.startswith('sdr_dqm'):
136 i = name[-1]
137 name = 'sdram_dm_' + i
138 name2 = 'sdram_dm(%s)' % i
139 pad = ['p_' + name, name2, name2]
140 elif name.startswith('sdr_d'):
141 i = name[5:]
142 name = 'sdram_dq_' + i
143 name2 = 'sdram_dq_%%s(%s)' % i
144 pad = ['p_'+name, name, name2 % 'o', name2 % 'i', name2 % 'oe']
145 elif name == 'sdr_csn0':
146 name = 'sdram_cs_n'
147 pad = ['p_' + name, name, name]
148 elif name[-1] == 'n':
149 name = 'sdram_' + name[4:-1] + '_n'
150 pad = ['p_' + name, name, name]
151 else:
152 name = 'sdram_' + name[4:]
153 pad = ['p_' + name, name, name]
154 litex_name = orig_name[:4] + "_".join(name.split("_")[1:])
155 # UART
156 elif name.startswith('uart'):
157 domain = 'UART'
158 name = 'uart_' + name[6:]
159 pad = ['p_' + name, name, name]
160 # GPIO
161 elif name.startswith('gpio'):
162 gbank = name[4]
163 domain = 'GPIO'
164 i = name[7:]
165 name = 'gpio_' + i
166 name2 = 'gpio_%%s(%s)' % i
167 pad = ['p_' + name, name, name2 % 'o', name2 % 'i', name2 % 'oe']
168 print ("GPIO pad", name, pad)
169 litex_name = "gpio_%s" % gbank + "_".join(name.split("_")[1:])
170 # I2C master-only
171 elif name.startswith('mtwi'):
172 domain = 'MTWI'
173 suffix = name[4:]
174 litex_name = 'mtwi' + suffix
175 name = 'i2c' + suffix
176 if name.startswith('i2c_sda'):
177 name2 = 'i2c_sda_%s'
178 pad = ['p_'+name, name, name2 % 'o', name2 % 'i', name2 % 'oe']
179 print ("I2C pad", name, pad)
180 else:
181 pad = ['p_' + name, name, name]
182 # I2C bi-directional
183 elif name.startswith('twi'):
184 domain = 'TWI'
185 name = 'i2c' + name[3:]
186 name2 = name + '_%s'
187 pad = ['p_'+name, name, name2 % 'o', name2 % 'i', name2 % 'oe']
188 print ("I2C pad", name, pad)
189 # EINT
190 elif name.startswith('eint'):
191 domain = 'EINT'
192 i = name[-1]
193 name = 'eint_%s' % i
194 name2 = 'eint_%s' % i
195 pad = ['p_' + name, name2, name2]
196 # PWM
197 elif name.startswith('pwm'):
198 domain = 'PWM'
199 name = name[:-4]
200 i = name[3:]
201 name2 = 'pwm(%s)' % i
202 pad = ['p_' + name, name2, name2]
203 else:
204 pad = ['p_' + name, name, name]
205 print ("GPIO pad", name, pad)
206
207 if litex_name is None:
208 litex_name = name
209
210 # JTAG domain
211 if name and name.startswith('jtag'):
212 domain = 'JTAG'
213
214 if name and not name.startswith('p_'):
215 if 'power' not in name and 'ground' not in name:
216 name = 'p_' + name
217 if name is not None:
218 print (padbank, banknum, name)
219 padbank[banknum] = name
220 # create domains
221 if domain is not None:
222 if domain not in domains:
223 domains[domain] = []
224 domains[domain].append(name)
225 dl = domain.lower()
226 if domain in psp.clocks and orig_name.startswith(dl):
227 clk = psp.clocks[domain]
228 if clk.lower() in orig_name: # TODO, might over-match
229 clocks[domain] = name
230 # record remap
231 pinmap[orig_name] = name
232 litexmap[litex_name] = name
233
234 # add pad to iopads
235 if domain and pad is not None:
236 # append direction from spec/domain. damn awkward processing
237 # to find it.
238 fn, name = orig_name.split("_")
239 if domain == 'PWM':
240 name = fn[3:]
241 print (psp.byspec)
242 spec = None
243 for k in psp.byspec.keys():
244 if k.startswith(domain):
245 spec = psp.byspec[k]
246 print ("spec found", domain, spec)
247 assert spec is not None
248 found = None
249 for pname in spec:
250 if pname.lower().startswith(name):
251 found = pname
252 print ("found spec", found)
253 assert found is not None
254 # whewwww. add the direction onto the pad spec list
255 dirn = found[-1]
256 if pad[-1] == 'A':
257 pad[-1] += dirn
258 else:
259 pad.append(dirn)
260 iopads.append(pad)
261 elif pad is not None:
262 iopads.append(pad)
263
264 # not connected
265 nc_idx = 0
266 for pl in pads.values():
267 for i in range(len(pl)):
268 if pl[i] == '':
269 name = 'nc_%d' % nc_idx
270 name2 = 'nc(%d)' % nc_idx
271 pl[i] = name
272 pinmap[name] = name
273 iopads.append([name, name2, name2, "-"])
274 nc_idx += 1
275
276 print (p.bankstart)
277 pprint(psp.clocks)
278
279 print()
280 for name, iopads in pads.items():
281 print ("%s pads" % name, iopads)
282
283 # do not want these
284 if 'SYS' in clocks:
285 del clocks['SYS']
286 if 'SYS' in domains:
287 del domains['SYS']
288
289 print ("chip domains (excluding sys-default)")
290 pprint(domains)
291 print ("chip clocks (excluding sys-default)")
292 pprint(clocks)
293 print ("pin spec")
294 pprint(psp.byspec)
295
296 chip = {
297 'pads.instances' : iopads,
298 'pins.specs' : psp.byspec,
299 'pins.map' : pinmap,
300 'litex.map' : litexmap,
301 'chip.domains' : domains,
302 'chip.clocks' : clocks,
303 'chip.n_intpower': n_intpower,
304 'chip.n_extpower': n_extpower,
305 }
306
307 if 'N' in pads:
308 chip['pads.north'] = pads['N']
309 if 'S' in pads:
310 chip['pads.south'] = pads['S']
311 if 'E' in pads:
312 chip['pads.east'] = pads['E']
313 if 'W' in pads:
314 chip['pads.west'] = pads['W']
315 else:
316 for name, iopads in pads.items():
317 chip['pads.side_%s' % name] = iopads
318
319 return pinmap, chip