write mux width and read back in
[pinmux.git] / src / parse.py
1 import math
2 import os.path
3
4
5 def missing_numbers(num_list):
6 original_list = [x for x in range(num_list[0], num_list[-1] + 1)]
7 num_list = set(num_list)
8 return (list(num_list ^ set(original_list)))
9
10
11 class Parse(object):
12 # == Parameters == #
13 N_MUX = 1 # number of selection lines for the mux per io
14 N_IO = 0
15 N_MUX_IO = 0
16 ADDR_WIDTH = 64 # TODO parameterise
17 PADDR_WIDTH = 32 # TODO parameterise
18 DATA_WIDTH = 64 # TODO parameterise
19 # ================ #
20
21 def __init__(self, pth=None, verify=True):
22
23 max_io = 0
24 self.muxed_cells = []
25 self.dedicated_cells = []
26 self.pinnumbers = []
27 self.bankwidths = {}
28 self.banksize = {}
29 self.bankstart = {}
30
31 fname = 'pinspec.txt'
32 if pth:
33 fname = os.path.join(pth, fname)
34 with open(fname) as bankwidths:
35 for lineno, line in enumerate(bankwidths):
36 line1 = line[:-1].split('\t')
37 self.bankwidths[line1[0]] = int(line1[3])
38 self.banksize[line1[0]] = int(line1[2])
39 self.bankstart[line1[0]] = int(line1[1])
40
41 # == capture the number of IO cells required == #
42 fname = 'pinmap.txt'
43 if pth:
44 fname = os.path.join(pth, fname)
45 with open(fname) as pinmapfile:
46 for lineno, line in enumerate(pinmapfile):
47 line1 = line[:-1].split('\t')
48 if len(line1) <= 2:
49 continue
50 self.pinnumbers.append(int(line1[0]))
51 # XXX TODO: dedicated pins in separate file
52 #if len(line1) == 2: # dedicated
53 # self.dedicated_cells.append(line1)
54 #else:
55 for i in range(1, len(line1)):
56 # XXX HORRIBLE HACK!!
57 if line1[i].startswith('pwm'):
58 line1[i] = 'pwm%s_out' % line1[i][4:]
59 self.muxed_cells.append(line1)
60
61 self.pinnumbers = sorted(self.pinnumbers)
62
63 if verify:
64 self.do_checks()
65
66 #self.cell_bitwidth = self.get_cell_bit_widths()
67
68 # == user info after parsing ================= #
69 self.N_IO = len(self.dedicated_cells) + len(self.muxed_cells)
70 print("Max number of IO: " + str(self.N_IO))
71 #print("Muxer bit width: " + str(self.cell_bitwidth))
72 print("Muxed IOs: " + str(len(self.muxed_cells)))
73 print("Dedicated IOs: " + str(len(self.dedicated_cells)))
74 #sys.exit(0)
75
76 def do_checks(self):
77 """ Multiple checks to see if the user has not screwed up
78 """
79 missing_pins = missing_numbers(self.pinnumbers)
80
81 # Check-1: ensure no pin is present in both muxed and dedicated pins
82 for muxcell in self.muxed_cells:
83 for dedcel in self.dedicated_cells:
84 if dedcel[1] in muxcell:
85 print("ERROR: " + str(dedcel[1]) + " present \
86 in dedicated & muxed lists")
87 exit(1)
88
89 # Check-2: if pin numbering is consistent:
90 if missing_pins:
91 print("ERROR: Following pins have no assignment: " +
92 str(missing_numbers(self.pinnumbers)))
93 exit(1)
94 unique = set(self.pinnumbers)
95 duplicate = False
96 for each in unique:
97 count = self.pinnumbers.count(each)
98 if count > 1:
99 print("ERROR: Multiple assignment for pin: " + str(each))
100 duplicate = True
101 if duplicate:
102 exit(1)
103
104 # Check-3: confirm if N_* matches the instances in the pinmap
105 # ============================================================== #
106
107 # TODO
108
109 def get_cell_bit_widths(self, banks):
110 max_num_cells = 0
111 for cell in self.muxed_cells:
112 print cell
113 max_num_cells = max(len(cell) - 1, max_num_cells)
114 return int(math.log(max_num_cells + 1, 2))
115
116
117 if __name__ == '__main__':
118 p = Parse()
119 print (p.N_IO)