81872fc9b70ed54b023adb16cb565dcfc6dc4be4
[pinmux.git] / src / spec / i_class.py
1 #!/usr/bin/env python
2
3 from spec.base import PinSpec
4
5 from spec.ifaceprint import display, display_fns, check_functions
6 from spec.ifaceprint import display_fixed
7
8
9 def pinspec():
10 pinbanks = {
11 'A': (28, 4),
12 'B': (18, 4),
13 'C': (24, 1),
14 }
15 fixedpins = {
16 'CTRL_SYS': [
17 'TEST',
18 'JTAG_SEL',
19 'UBOOT_SEL',
20 'NMI#',
21 'RESET#',
22 'CLK24M_IN',
23 'CLK24M_OUT',
24 'PLLTEST',
25 'PLLREGIO',
26 'PLLVP25',
27 'PLLDV',
28 'PLLVREG',
29 'PLLGND',
30 ],
31 'POWER_GPIO': [
32 'VDD_GPIOB',
33 'GND_GPIOB',
34 ]}
35 function_names = {'EINT': 'External Interrupt',
36 'FB': 'MC68k FlexBus',
37 'IIS': 'I2S Audio',
38 'JTAG': 'JTAG (JTAG_SEL=HI/LO)',
39 'LCD': '24-pin RGB/TTL LCD',
40 'RG': 'RGMII Ethernet',
41 'MMC': 'eMMC 1/2/4/8 pin',
42 'PWM': 'PWM (pulse-width modulation)',
43 'SD0': 'SD/MMC 0',
44 'SD1': 'SD/MMC 1',
45 'SD2': 'SD/MMC 2',
46 'MSPI0': 'SPI (Serial Peripheral Interface) Master 0',
47 'MSPI1': 'SPI (Serial Peripheral Interface) Master 1',
48 'MQSPI': 'Quad SPI Master 0',
49 'TWI0': 'I2C 0',
50 'TWI1': 'I2C 1',
51 'TWI2': 'I2C 2',
52 'QUART0': 'UART (TX/RX/CTS/RTS) 0',
53 'QUART1': 'UART (TX/RX/CTS/RTS) 1',
54 'UART0': 'UART (TX/RX) 0',
55 'UART1': 'UART (TX/RX) 1',
56 'UART2': 'UART (TX/RX) 2',
57 'ULPI0': 'ULPI (USB Low Pin-count) 0',
58 'ULPI1': 'ULPI (USB Low Pin-count) 1',
59 'ULPI2': 'ULPI (USB Low Pin-count) 2',
60 }
61
62 ps = PinSpec(pinbanks, fixedpins, function_names,
63 ['lcd', 'jtag', 'fb'])
64
65 # Bank A, 0-27
66 ps.gpio("", ('A', 0), 0, 0, 28)
67 ps.rgbttl("", ('A', 0), 1, limit=22)
68 ps.mspi("0", ('A', 10), 2)
69 ps.mquadspi("", ('A', 4), 2)
70 ps.uart("0", ('A', 16), 2)
71 ps.i2c("1", ('A', 18), 2)
72 ps.pwm("", ('A', 21), 2, 0, 3)
73 ps.sdmmc("0", ('A', 22), 3)
74 ps.eint("", ('A', 0), 3, 0, 4)
75 ps.eint("", ('A', 20), 2, 4, 1)
76 ps.eint("", ('A', 23), 1, 5, 1)
77 ps.sdmmc("1", ('A', 4), 3)
78 ps.jtag("", ('A', 10), 3)
79 ps.uartfull("0", ('A', 14), 3)
80 ps.uartfull("1", ('A', 18), 3)
81 ps.jtag("", ('A', 24), 2)
82 ps.mspi("1", ('A', 24), 1)
83 ps.i2c("0", ('A', 0), 2)
84 ps.uart("1", ('A', 2), 2)
85 ps.uart("2", ('A', 14), 2)
86
87 # see comment in spec.interfaces.PinGen, this is complicated.
88 flexspec = {
89 #'FB_TS': ('FB_ALE', 2), # commented out for now
90 'FB_CS2': ('FB_BWE2', 2),
91 'FB_AD0': ('FB_BWE2', 3),
92 'FB_CS3': ('FB_BWE3', 2),
93 'FB_AD1': ('FB_BWE3', 3),
94 'FB_TBST': ('FB_OE', 2),
95 'FB_TSIZ0': ('FB_BWE0', 2),
96 'FB_TSIZ1': ('FB_BWE1', 2),
97 }
98 ps.gpio("", ('B', 0), 0, 0, 18)
99 ps.flexbus1("", ('B', 0), 1, spec=flexspec)
100
101 ps.flexbus2("", ('C', 0), 0)
102
103 # Scenarios below can be spec'd out as either "find first interface"
104 # by name/number e.g. SPI1, or as "find in bank/mux" which must be
105 # spec'd as "BM:Name" where B is bank (A-F), M is Mux (0-3)
106 # EINT and PWM are grouped together, specially, but may still be spec'd
107 # using "BM:Name". Pins are removed in-order as listed from
108 # lists (interfaces, EINTs, PWMs) from available pins.
109
110 i_class = ['ULPI0/8', 'ULPI1', 'MMC', 'SD0', 'UART0',
111 'TWI0', 'MSPI0', 'B3:SD1', ]
112 i_class_eint = ['EINT_0', 'EINT_1', 'EINT_2', 'EINT_3', 'EINT_4']
113 i_class_pwm = ['B2:PWM_0']
114 descriptions = {
115 'MMC': 'internal (on Card)',
116 'SD0': 'user-facing: internal (on Card), multiplexed with JTAG\n'
117 'and UART2, for debug purposes',
118 'TWI2': 'I2C.\n',
119 'E2:SD1': '',
120 'MSPI1': '',
121 'UART0': '',
122 'B1:LCD/22': '18-bit RGB/TTL LCD',
123 'ULPI0/8': 'user-facing: internal (on Card), USB-OTG ULPI PHY',
124 'ULPI1': 'dual USB2 Host ULPI PHY'
125 }
126
127 ps.add_scenario("I-Class", i_class, i_class_eint, i_class_pwm,
128 descriptions)
129
130 return ps