src/spec/pinfunctions.py

   1 #!/usr/bin/env python
   2
   3 """ define functions here, with their pin names and the pin type.
   4
   5     each function returns a pair of lists
   6     (or objects with a __getitem__ function)
   7
   8     the first list (or object) contains pin name plus type specifications.
   9
  10     the type is:
  11
  12     * "-" for an input pin,
  13     * "+" for an output pin,
  14     * "*" for an in/out pin
  15
  16     each function is then added to the pinspec tuple, below, as a ("NAME",
  17     function) entry.
  18
  19     different functions may be added multiple times under the same NAME,
  20     so that complex (or large) functions can be split into one or more
  21     groups (and placed on different pinbanks).
  22
  23     eint, pwm and gpio are slightly odd in that instead of a fixed list
  24     an object is returned with a __getitem__ function that accepts a
  25     slice object.  in this way the actual generation of the pin name
  26     is delayed until it is known precisely how many pins are to be
  27     generated, and that's not known immediately (or it would be if
  28     every single one of the functions below had a start and end parameter
  29     added).  see spec.interfaces.PinGen class slice on pingroup
  30
  31     the second list is the names of pins that are part of an inout bus.
  32     this list of pins (a ganged group) will need to be changed under
  33     the control of the function, as a group.  for example: sdmmc's
  34     D0-D3 pins are in-out, they all change from input to output at
  35     the same time under the control of the function, therefore there's
  36     no point having multiple in-out switch/control wires, as the
  37     sdmmc is never going to do anything other than switch this entire
  38     bank all at once.  so in this particular example, sdmmc returns:
  39
  40         (['CMD+', 'CLK+', 'D0*', 'D1*', 'D2*', 'D3*'] # pin names
  41          ['D0*', 'D1*', 'D2*', 'D3*'])                # ganged bus names
  42 """
  43
  44
  45 def i2s(suffix, bank):
  46     return (['MCK+', 'BCK+', 'LRCK+', 'DI-', 'DO+'],
  47             [])
  48
  49
  50 def emmc(suffix, bank, pincount=8):
  51     emmcpins = ['CMD+', 'CLK+']
  52     inout = []
  53     for i in range(pincount):
  54         pname = "D%d*" % i
  55         emmcpins.append(pname)
  56         inout.append(pname)
  57     return (emmcpins, inout)
  58
  59
  60 def sdmmc(suffix, bank):
  61     return emmc(suffix, bank, pincount=4)
  62
  63
  64 def spi(suffix, bank):
  65     pins = ['CLK*', 'NSS*', 'MOSI*', 'MISO*']
  66     return (pins, [])
  67
  68
  69 def quadspi(suffix, bank):
  70     qpins = ['CK*', 'NSS*']
  71     inout = []
  72     for i in range(4):
  73         pname = "IO%d*" % i
  74         qpins.append(pname)
  75         inout.append(pname)
  76     return (qpins, inout)
  77
  78
  79 def i2c(suffix, bank):
  80     return (['SDA*', 'SCL*'], [])
  81
  82
  83 def jtag(suffix, bank):
  84     return (['TMS+', 'TDI-', 'TDO+', 'TCK+'], [])
  85
  86
  87 def uart(suffix, bank):
  88     return (['TX+', 'RX-'], [])
  89
  90
  91 def ulpi(suffix, bank):
  92     ulpipins = ['CK+', 'DIR+', 'STP+', 'NXT+']
  93     for i in range(8):
  94         ulpipins.append('D%d*' % i)
  95     return (ulpipins, [])
  96
  97
  98 def uartfull(suffix, bank):
  99     return (['TX+', 'RX-', 'CTS-', 'RTS+'],
 100             [])
 101
 102
 103 def rgbttl(suffix, bank):
 104     ttlpins = ['CK+', 'DE+', 'HS+', 'VS+']
 105     for i in range(24):
 106         ttlpins.append("D%d+" % i)
 107     return (ttlpins, [])
 108
 109
 110 def rgmii(suffix, bank):
 111     buspins = []
 112     for i in range(4):
 113         buspins.append("ERXD%d-" % i)
 114     for i in range(4):
 115         buspins.append("ETXD%d+" % i)
 116     buspins += ['ERXCK-', 'ERXERR-', 'ERXDV-',
 117                 'EMDC+', 'EMDIO*',
 118                 'ETXEN+', 'ETXCK+', 'ECRS-',
 119                 'ECOL+', 'ETXERR+']
 120     return (buspins, [])
 121
 122
 123 def flexbus1(suffix, bank):
 124     buspins = []
 125     inout = []
 126     for i in range(8):
 127         pname = "AD%d*" % i
 128         buspins.append(pname)
 129         inout.append(pname)
 130     for i in range(2):
 131         buspins.append("CS%d+" % i)
 132     buspins += ['ALE', 'OE', 'RW', 'TA', 'CLK+',
 133                 'A0', 'A1', 'TS', 'TBST',
 134                 'TSIZ0', 'TSIZ1']
 135     for i in range(4):
 136         buspins.append("BWE%d" % i)
 137     for i in range(2, 6):
 138         buspins.append("CS%d+" % i)
 139     return (buspins, inout)
 140
 141
 142 def flexbus2(suffix, bank):
 143     buspins = []
 144     for i in range(8, 32):
 145         buspins.append("AD%d*" % i)
 146     return (buspins, buspins)
 147
 148
 149 def sdram1(suffix, bank):
 150     buspins = []
 151     inout = []
 152     for i in range(16):
 153         pname = "SDRDQM%d*" % i
 154         buspins.append(pname)
 155         inout.append(pname)
 156     for i in range(12):
 157         buspins.append("SDRAD%d+" % i)
 158     for i in range(8):
 159         buspins.append("SDRDQ%d+" % i)
 160     for i in range(3):
 161         buspins.append("SDRCS%d#+" % i)
 162     for i in range(2):
 163         buspins.append("SDRDQ%d+" % i)
 164     for i in range(2):
 165         buspins.append("SDRBA%d+" % i)
 166     buspins += ['SDRCKE+', 'SDRRAS#+', 'SDRCAS#+', 'SDRWE#+',
 167                 'SDRRST+']
 168     return (buspins, inout)
 169
 170
 171 def sdram2(suffix, bank):
 172     buspins = []
 173     inout = []
 174     for i in range(3, 6):
 175         buspins.append("SDRCS%d#+" % i)
 176     for i in range(16, 32):
 177         pname = "SDRDQM%d*" % i
 178         buspins.append(pname)
 179         inout.append(pname)
 180     return (buspins, inout)
 181
 182
 183 def mcu8080(suffix, bank):
 184     buspins = []
 185     inout = []
 186     for i in range(8):
 187         pname = "MCUD%d*" % i
 188         buspins.append(pname)
 189         inout.append(pname)
 190     for i in range(8):
 191         buspins.append("MCUAD%d+" % (i + 8))
 192     for i in range(6):
 193         buspins.append("MCUCS%d+" % i)
 194     for i in range(2):
 195         buspins.append("MCUNRB%d+" % i)
 196     buspins += ['MCUCD+', 'MCURD+', 'MCUWR+', 'MCUCLE+', 'MCUALE+',
 197                 'MCURST+']
 198     return (buspins, inout)
 199
 200
 201 class RangePin(object):
 202     def __init__(self, suffix, prefix=None):
 203         self.suffix = suffix
 204         self.prefix = prefix or ''
 205
 206     def __getitem__(self, s):
 207         res = []
 208         for idx in range(s.start or 0, s.stop or -1, s.step or 1):
 209             res.append("%s%d%s" % (self.prefix, idx, self.suffix))
 210         return res
 211
 212
 213 def eint(suffix, bank):
 214     return (RangePin("-"), [])
 215
 216
 217 def pwm(suffix, bank):
 218     return (RangePin("+"), [])
 219
 220
 221 def gpio(suffix, bank):
 222     return (("GPIO%s" % bank, RangePin(prefix=bank, suffix="*")), [])
 223
 224
 225 # list functions by name here
 226
 227 pinspec = (('IIS', i2s),
 228            ('MMC', emmc),
 229            ('SD', sdmmc),
 230            ('SPI', spi),
 231            ('QSPI', quadspi),
 232            ('TWI', i2c),
 233            ('JTAG', jtag),
 234            ('UART', uart),
 235            ('QUART', uartfull),
 236            ('LCD', rgbttl),
 237            ('ULPI', ulpi),
 238            ('RG', rgmii),
 239            ('FB', flexbus1),
 240            ('FB', flexbus2),
 241            ('SDR', sdram1),
 242            ('SDR', sdram2),
 243            ('EINT', eint),
 244            ('PWM', pwm),
 245            ('GPIO', gpio),
 246            )