add flexbus get/put link
[pinmux.git] / src / spec / pinfunctions.py
1 #!/usr/bin/env python
2
3 """ define functions here, with their pin names and the pin type.
4
5 each function returns a pair of lists
6 (or objects with a __getitem__ function)
7
8 the first list (or object) contains pin name plus type specifications.
9
10 the type is:
11
12 * "-" for an input pin,
13 * "+" for an output pin,
14 * "*" for an in/out pin
15
16 each function is then added to the pinspec tuple, below, as a ("NAME",
17 function) entry.
18
19 different functions may be added multiple times under the same NAME,
20 so that complex (or large) functions can be split into one or more
21 groups (and placed on different pinbanks).
22
23 eint, pwm and gpio are slightly odd in that instead of a fixed list
24 an object is returned with a __getitem__ function that accepts a
25 slice object. in this way the actual generation of the pin name
26 is delayed until it is known precisely how many pins are to be
27 generated, and that's not known immediately (or it would be if
28 every single one of the functions below had a start and end parameter
29 added). see spec.interfaces.PinGen class slice on pingroup
30
31 the second list is the names of pins that are part of an inout bus.
32 this list of pins (a ganged group) will need to be changed under
33 the control of the function, as a group. for example: sdmmc's
34 D0-D3 pins are in-out, they all change from input to output at
35 the same time under the control of the function, therefore there's
36 no point having multiple in-out switch/control wires, as the
37 sdmmc is never going to do anything other than switch this entire
38 bank all at once. so in this particular example, sdmmc returns:
39
40 (['CMD+', 'CLK+', 'D0*', 'D1*', 'D2*', 'D3*'] # pin names
41 ['D0*', 'D1*', 'D2*', 'D3*']) # ganged bus names
42 """
43
44
45 def i2s(suffix, bank):
46 return (['MCK+', 'BCK+', 'LRCK+', 'DI-', 'DO+'],
47 [])
48
49
50 def emmc(suffix, bank, pincount=8):
51 emmcpins = ['CMD+', 'CLK+']
52 inout = []
53 for i in range(pincount):
54 pname = "D%d*" % i
55 emmcpins.append(pname)
56 inout.append(pname)
57 return (emmcpins, inout)
58
59
60 def sdmmc(suffix, bank):
61 return emmc(suffix, bank, pincount=4)
62
63
64 def nspi(suffix, bank, iosize, masteronly=True):
65 if masteronly:
66 qpins = ['CK+', 'NSS+']
67 else:
68 qpins = ['CK*', 'NSS*']
69 inout = []
70 for i in range(iosize):
71 pname = "IO%d*" % i
72 qpins.append(pname)
73 inout.append(pname)
74 return (qpins, inout)
75
76
77 def mspi(suffix, bank):
78 return nspi(suffix, bank, 2, masteronly=True)
79
80
81 def mquadspi(suffix, bank):
82 return nspi(suffix, bank, 4, masteronly=True)
83
84
85 def spi(suffix, bank):
86 return nspi(suffix, bank, 2)
87
88
89 def quadspi(suffix, bank):
90 return nspi(suffix, bank, 4)
91
92
93 def i2c(suffix, bank):
94 return (['SDA*', 'SCL*'], [])
95
96
97 def jtag(suffix, bank):
98 return (['TMS+', 'TDI-', 'TDO+', 'TCK+'], [])
99
100
101 def uart(suffix, bank):
102 return (['TX+', 'RX-'], [])
103
104
105 def ulpi(suffix, bank):
106 ulpipins = ['CK+', 'DIR+', 'STP+', 'NXT+']
107 for i in range(8):
108 ulpipins.append('D%d*' % i)
109 return (ulpipins, [])
110
111
112 def uartfull(suffix, bank):
113 return (['TX+', 'RX-', 'CTS-', 'RTS+'],
114 [])
115
116
117 def rgbttl(suffix, bank):
118 ttlpins = ['CK+', 'DE+', 'HS+', 'VS+']
119 for i in range(24):
120 ttlpins.append("OUT%d+" % i)
121 return (ttlpins, [])
122
123
124 def rgmii(suffix, bank):
125 buspins = []
126 for i in range(4):
127 buspins.append("ERXD%d-" % i)
128 for i in range(4):
129 buspins.append("ETXD%d+" % i)
130 buspins += ['ERXCK-', 'ERXERR-', 'ERXDV-',
131 'EMDC+', 'EMDIO*',
132 'ETXEN+', 'ETXCK+', 'ECRS-',
133 'ECOL+', 'ETXERR+']
134 return (buspins, [])
135
136
137 def flexbus1(suffix, bank):
138 buspins = []
139 inout = []
140 for i in range(8):
141 pname = "AD%d*" % i
142 buspins.append(pname)
143 inout.append(pname)
144 for i in range(2):
145 buspins.append("CS%d+" % i)
146 buspins += ['ALE+', 'OE+', 'RW+', 'TA-',
147 # 'TS+', commented out for now, mirrors ALE, for mux'd mode
148 'TBST+',
149 'TSIZ0+', 'TSIZ1+']
150 for i in range(4):
151 buspins.append("BWE%d+" % i)
152 for i in range(2, 6):
153 buspins.append("CS%d+" % i)
154 return (buspins, inout)
155
156
157 def flexbus2(suffix, bank):
158 buspins = []
159 for i in range(8, 32):
160 buspins.append("AD%d*" % i)
161 return (buspins, buspins)
162
163
164 def sdram1(suffix, bank):
165 buspins = []
166 inout = []
167 for i in range(16):
168 pname = "SDRDQM%d*" % i
169 buspins.append(pname)
170 inout.append(pname)
171 for i in range(12):
172 buspins.append("SDRAD%d+" % i)
173 for i in range(8):
174 buspins.append("SDRDQ%d+" % i)
175 for i in range(3):
176 buspins.append("SDRCS%d#+" % i)
177 for i in range(2):
178 buspins.append("SDRDQ%d+" % i)
179 for i in range(2):
180 buspins.append("SDRBA%d+" % i)
181 buspins += ['SDRCKE+', 'SDRRAS#+', 'SDRCAS#+', 'SDRWE#+',
182 'SDRRST+']
183 return (buspins, inout)
184
185
186 def sdram2(suffix, bank):
187 buspins = []
188 inout = []
189 for i in range(3, 6):
190 buspins.append("SDRCS%d#+" % i)
191 for i in range(16, 32):
192 pname = "SDRDQM%d*" % i
193 buspins.append(pname)
194 inout.append(pname)
195 return (buspins, inout)
196
197
198 def mcu8080(suffix, bank):
199 buspins = []
200 inout = []
201 for i in range(8):
202 pname = "MCUD%d*" % i
203 buspins.append(pname)
204 inout.append(pname)
205 for i in range(8):
206 buspins.append("MCUAD%d+" % (i + 8))
207 for i in range(6):
208 buspins.append("MCUCS%d+" % i)
209 for i in range(2):
210 buspins.append("MCUNRB%d+" % i)
211 buspins += ['MCUCD+', 'MCURD+', 'MCUWR+', 'MCUCLE+', 'MCUALE+',
212 'MCURST+']
213 return (buspins, inout)
214
215
216 class RangePin(object):
217 def __init__(self, suffix, prefix=None):
218 self.suffix = suffix
219 self.prefix = prefix or ''
220
221 def __getitem__(self, s):
222 res = []
223 for idx in range(s.start or 0, s.stop or -1, s.step or 1):
224 res.append("%s%d%s" % (self.prefix, idx, self.suffix))
225 return res
226
227
228 def eint(suffix, bank):
229 return (RangePin("-"), [])
230
231
232 def pwm(suffix, bank):
233 return (RangePin("+"), [])
234
235
236 def gpio(suffix, bank):
237 return (("GPIO%s" % bank, RangePin(prefix=bank, suffix="*")), [])
238
239
240 # list functions by name here
241
242 pinspec = (('IIS', i2s),
243 ('MMC', emmc),
244 ('SD', sdmmc),
245 ('MSPI', mspi),
246 ('MQSPI', mquadspi),
247 ('SPI', spi),
248 ('QSPI', quadspi),
249 ('TWI', i2c),
250 ('JTAG', jtag),
251 ('UART', uart),
252 ('QUART', uartfull),
253 ('LCD', rgbttl),
254 ('ULPI', ulpi),
255 ('RG', rgmii),
256 ('FB', flexbus1),
257 ('FB', flexbus2),
258 ('SDR', sdram1),
259 ('SDR', sdram2),
260 ('EINT', eint),
261 ('PWM', pwm),
262 ('GPIO', gpio),
263 )