- io = []
- fmt = "%s_i %s_o %s_oe"
- scl = fmt % (scl, scl, scl)
- sda = fmt % (sda, sda, sda)
- io.append(Subsignal("scl", Pins(scl, dir="io", assert_width=3)))
- io.append(Subsignal("sda", Pins(sda, dir="io", assert_width=3)))
- return Resource.family(*args, default_name="i2c", ios=io)
+ ios = []
+ pads = []
+ pads.append(Subsignal("i", Pins(sda+"_i", dir="i", assert_width=1)))
+ pads.append(Subsignal("o", Pins(sda+"_o", dir="o", assert_width=1)))
+ pads.append(Subsignal("oe", Pins(sda+"_oe", dir="o", assert_width=1)))
+ ios.append(Resource.family(sda, 0, default_name=sda, ios=pads))
+ pads = []
+ pads.append(Subsignal("i", Pins(scl+"_i", dir="i", assert_width=1)))
+ pads.append(Subsignal("o", Pins(scl+"_o", dir="o", assert_width=1)))
+ pads.append(Subsignal("oe", Pins(scl+"_oe", dir="o", assert_width=1)))
+ ios.append(Resource.family(scl, 0, default_name=scl, ios=pads))
+ return Resource.family(*args, default_name="i2c", ios=ios)